On Fri, Dec 05, 2014 at 02:15:21PM +0000, Chris Wilson wrote:
> On Sandybridge+, the GPU provides the ERROR register for detecting page
> faults. Hook this up to our hangcheck so that we can dump the error
> state soon after such an event occurs. This would be better inside an
> interrupt handler, but it serves a purpose here as it detects that our
> initial context setup is invalid...
>
> Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_irq.c | 5 +++++
> drivers/gpu/drm/i915/intel_uncore.c | 2 ++
> 2 files changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 7913a72ce30a..eb2149b941e4 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -2969,6 +2969,11 @@ static void i915_hangcheck_elapsed(unsigned long data)
> if (!i915.enable_hangcheck)
> return;
>
> + if (INTEL_INFO(dev_priv)->gen >= 6 && I915_READ(ERROR_GEN6)) {
> + i915_handle_error(dev, false, "GPU reported a page fault");
Is the full hangcheck state actually useful for debugging these
pagefaults? The gpu doesn't seem to fall over completely, so I guess ACTHD
and friends are somewhere in nirvana.
Enabling the interrupts would definitely be useful though. I think all the
handler code is written already (perhaps a few missing drm_debug lines),
it's just that we don't enable these interrupt sources by default.
-Daniel
> + I915_WRITE(ERROR_GEN6, 0);
> + }
> +
> for_each_ring(ring, dev_priv, i) {
> u64 acthd;
> u32 seqno;
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index 0655b44651a7..67f2e24c5bc5 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -535,6 +535,8 @@ static void __intel_uncore_early_sanitize(struct drm_device *dev,
> if (IS_GEN6(dev) || IS_GEN7(dev))
> __raw_i915_write32(dev_priv, GTFIFODBG,
> __raw_i915_read32(dev_priv, GTFIFODBG));
> + if (INTEL_INFO(dev)->gen >= 6)
> + __raw_i915_write32(dev_priv, ERROR_GEN6, 0);
>
> intel_uncore_forcewake_reset(dev, restore_forcewake);
> }
> --
> 2.1.3
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
