On Thu, Dec 04, 2014 at 12:58:40PM +0200, Ville Syrjälä wrote: > On Wed, Dec 03, 2014 at 07:15:31PM +0000, Arun Siluvery wrote: > > These w/a were recently identified while debugging another issue, > > +WaClearFlowControlGpgpuContextSave:chv > > +Wa4x4STCOptimizationDisable:chv > > > > For: VIZ-4090 > > Change-Id: I08d2176dec609396c3a7c2e48b2413e233799fc4 > > Signed-off-by: Arun Siluvery <arun.siluvery@xxxxxxxxxxxxxxx> > > --- > > drivers/gpu/drm/i915/i915_reg.h | 1 + > > drivers/gpu/drm/i915/intel_ringbuffer.c | 5 +++++ > > 2 files changed, 6 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > > index dc03fac..7c7663f 100644 > > --- a/drivers/gpu/drm/i915/i915_reg.h > > +++ b/drivers/gpu/drm/i915/i915_reg.h > > @@ -6131,6 +6131,7 @@ enum punit_power_well { > > #define GEN9_DG_MIRROR_FIX_ENABLE (1<<5) > > > > #define GEN8_ROW_CHICKEN 0xe4f0 > > +#define FLOW_CONTROL_ENABLE (1<<15) > > #define PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE (1<<8) > > #define STALL_DOP_GATING_DISABLE (1<<5) > > > > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c > > index 79b4ca5..525c9bf 100644 > > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c > > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c > > @@ -796,8 +796,10 @@ static int chv_init_workarounds(struct intel_engine_cs *ring) > > > > /* WaDisablePartialInstShootdown:chv */ > > /* WaDisableThreadStallDopClockGating:chv */ > > + /* WaClearFlowControlGpgpuContextSave:chv */ > > WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN, > > PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE | > > + FLOW_CONTROL_ENABLE | > > This seems to be the default value already. I suppose there's no real > harm in setting it though, but then we should also do the same for BDW. > > Would be nice if we actually did a GPU reset on driver load to guarantee > a more consistent initial state... We have some half-baked testcase to compare the different wa registers states after driver load, reset and suspend/resume. But that's not yet been fixed up to also take all the static wa settings into account. Would be awesome if that would finally happen. /me dreaming ;-) Cheers, Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx