On Wed, Dec 03, 2014 at 02:13:58PM +0000, Damien Lespiau wrote: > > +/* To be used in a similar way to mmap_gtt */ > > +drm_public int > > +drm_intel_gem_bo_map_wc(drm_intel_bo *bo) { > > + drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; > > + drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; > > + struct drm_i915_gem_set_domain set_domain; > > + int ret; > > + > > + pthread_mutex_lock(&bufmgr_gem->lock); > > + > > + ret = map_wc(bo); > > + if (ret) { > > + pthread_mutex_unlock(&bufmgr_gem->lock); > > + return ret; > > + } > > + > > + /* Now move it to the GTT domain so that the GPU and CPU > > + * caches are flushed and the GPU isn't actively using the > > + * buffer. > > + * > > + * The domain change is done even for the objects which > > + * are not bounded. For them first the pages are acquired, > > + * before the domain change. > > + */ > > + VG_CLEAR(set_domain); > > + set_domain.handle = bo_gem->gem_handle; > > + set_domain.read_domains = I915_GEM_DOMAIN_GTT; > > + set_domain.write_domain = I915_GEM_DOMAIN_GTT; > > + ret = drmIoctl(bufmgr_gem->fd, > > + DRM_IOCTL_I915_GEM_SET_DOMAIN, > > + &set_domain); > > + if (ret != 0) { > > + DBG("%s:%d: Error setting domain %d: %s\n", > > + __FILE__, __LINE__, bo_gem->gem_handle, > > + strerror(errno)); > > + } > > Why move the buffer to the GTT domain and not the CPU domain here? The entire point of the mmap(wc) interface is to access the buffer outside of the CPU cache domain, and not using the GTT indirection. We have 3 cache domains: in GPU, in CPU, neither (aka GTT). -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx