>-----Original Message----- >From: Intel-gfx [mailto:intel-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx] On Behalf Of Rodrigo Vivi >Sent: Friday, November 14, 2014 10:23 PM >To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx >Cc: Vivi, Rodrigo >Subject: [PATCH 06/15] drm/i915: PSR get full link off x standby from VBT > >OEMs can specify if full_link might be always enabled, i.e. only_standby >over VBT. > >Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> I have not looked at/tried these VBT bits myself. If that's ok then, For patches 4,5,6: Reviewed-by: Durgadoss R <durgadoss.r@xxxxxxxxx> Thanks, Durga >--- > drivers/gpu/drm/i915/intel_psr.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > >diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c >index 576568e..e706c9d 100644 >--- a/drivers/gpu/drm/i915/intel_psr.c >+++ b/drivers/gpu/drm/i915/intel_psr.c >@@ -120,7 +120,7 @@ static void intel_psr_enable_sink(struct intel_dp *intel_dp) > struct drm_i915_private *dev_priv = dev->dev_private; > uint32_t aux_clock_divider; > int precharge = 0x3; >- bool only_standby = false; >+ bool only_standby = dev_priv->vbt.psr.full_link; > static const uint8_t aux_msg[] = { > [0] = DP_AUX_NATIVE_WRITE << 4, > [1] = DP_SET_POWER >> 8, >-- >1.9.3 > >_______________________________________________ >Intel-gfx mailing list >Intel-gfx@xxxxxxxxxxxxxxxxxxxxx >http://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
