Re: [PATCH v5 3/4] drm/i915/bdw: Pin the context backing objects to GGTT on-demand

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> -----Original Message-----
> From: Intel-gfx [mailto:intel-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx] On Behalf
> Of Daniel, Thomas
> Sent: Tuesday, November 18, 2014 9:28 AM
> To: Daniel Vetter
> Cc: intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> Subject: Re:  [PATCH v5 3/4] drm/i915/bdw: Pin the context
> backing objects to GGTT on-demand
> 
> > -----Original Message-----
> > From: Daniel Vetter [mailto:daniel.vetter@xxxxxxxx] On Behalf Of
> > Daniel Vetter
> > Sent: Monday, November 17, 2014 6:09 PM
> > To: Daniel, Thomas
> > Cc: intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> > Subject: Re:  [PATCH v5 3/4] drm/i915/bdw: Pin the context
> > backing objects to GGTT on-demand
> >
> > On Thu, Nov 13, 2014 at 10:28:10AM +0000, Thomas Daniel wrote:
> > > diff --git a/drivers/gpu/drm/i915/i915_drv.h
> > > b/drivers/gpu/drm/i915/i915_drv.h index 059330c..3c7299d 100644
> > > --- a/drivers/gpu/drm/i915/i915_drv.h
> > > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > > @@ -655,6 +655,7 @@ struct intel_context {
> > >  	struct {
> > >  		struct drm_i915_gem_object *state;
> > >  		struct intel_ringbuffer *ringbuf;
> > > +		int unpin_count;
> >
> > Pinning is already refcounted. Why this additional refcount?
> 
> The vma.pin_count is only allocated 4 bits of storage.  If this restriction can be
> lifted then I can use that.

Actually I just tried to implement this, it causes a problem for patch 4 of this set as the unpin_count is also used for the ringbuffer object which has an ioremap as well as a ggtt pin.

Thomas.


> > And yes I've only realized this now that you've supplied the review
> > comments from Akash. I really rely upon the review discussions to spot
> > such low-level implementation details.
> 
> I know, and I explicitly asked the guys to post comments to the mailing list.
> 
> Cheers,
> Thomas.
> 
> > -Daniel
> > --
> > Daniel Vetter
> > Software Engineer, Intel Corporation
> > +41 (0) 79 365 57 48 - http://blog.ffwll.ch
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