On Mon, Nov 10, 2014 at 03:34:33PM +0200, Imre Deak wrote:
> Paulo noticed that we don't support RPS on GEN9 yet, so WARN for and
> ignore any RPS interrupts on that platform.
>
> Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx>
Pulled in up to this one from this series, I'll wait for Paulo to
double-check the new versions of the subsequent patches.
Thanks, Daniel
> ---
> drivers/gpu/drm/i915/i915_irq.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 96d150f..729e9a3 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1690,6 +1690,11 @@ static void i9xx_pipe_crc_irq_handler(struct drm_device *dev, enum pipe pipe)
> * the work queue. */
> static void gen6_rps_irq_handler(struct drm_i915_private *dev_priv, u32 pm_iir)
> {
> + /* TODO: RPS on GEN9 is not supported yet. */
> + if (WARN_ONCE(INTEL_INFO(dev_priv)->gen == 9,
> + "GEN9: unexpected RPS IRQ\n"))
> + return;
> +
> if (pm_iir & dev_priv->pm_rps_events) {
> spin_lock(&dev_priv->irq_lock);
> dev_priv->rps.pm_iir |= pm_iir & dev_priv->pm_rps_events;
> --
> 1.8.4
>
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--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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