On Fri, Nov 07, 2014 at 05:45:01PM +0000, daniele.ceraolospurio@xxxxxxxxx wrote:
> +/**
> + * DOC: execlist_submit_context tracepoint
> + *
> + * These tracepoint are used to track the contexts that are submitted to the
> + * ring. An mm switch is automatically performed by the GPU during the context
> + * switch. Given the fact that the mm switch is an important point in the
> + * lifetime of a vm, the vm assigned to the context is also printed by the
> + * tracepoint when full ppgtt is enabled.
> + */
> +TRACE_EVENT(execlists_submit_context,
> + TP_PROTO(struct intel_engine_cs *ring, u32 to_num, struct intel_context *to),
> +
> + TP_ARGS(ring, to_num, to),
> +
> + TP_STRUCT__entry(
> + __field(u32, ring)
> + __field(u32, to_num)
> + __field(struct intel_context *, to)
> + __field(struct i915_address_space *, vm)
> + __field(u32, dev)
> + ),
> +
> + TP_fast_assign(
> + __entry->ring = ring->id;
> + __entry->to_num = to_num;
> + __entry->to = to;
> + __entry->vm = to->ppgtt ? &to->ppgtt->base : NULL;
> + __entry->dev = ring->dev->primary->index;
> + ),
> +
> + TP_printk("dev=%u, ring=%u, ctx%d=%p, ctx_vm=%p",
> + __entry->dev, __entry->ring,
> + __entry->to_num, __entry->to, __entry->vm)
> +);
> +
> #endif /* _I915_TRACE_H_ */
>
> /* This part must be outside protection */
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 6025ac7..e72759d 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -135,6 +135,7 @@
> #include <drm/drmP.h>
> #include <drm/i915_drm.h>
> #include "i915_drv.h"
> +#include "i915_trace.h"
>
> #define GEN8_LR_CONTEXT_RENDER_SIZE (20 * PAGE_SIZE)
> #define GEN8_LR_CONTEXT_OTHER_SIZE (2 * PAGE_SIZE)
> @@ -367,6 +368,7 @@ static void execlists_submit_contexts(struct intel_engine_cs *ring,
> BUG_ON(!ctx_obj0);
> WARN_ON(!i915_gem_obj_is_pinned(ctx_obj0));
>
> + trace_execlists_submit_context(ring, 0, to0);
> execlists_ctx_write_tail(ctx_obj0, tail0);
This is very tenuous. This is not part of the context lifetime but of
the request.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
