On Fri, 07 Nov 2014, ville.syrjala@xxxxxxxxxxxxxxx wrote: > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > VLV/CHV have backlight controls only on pipes A and B. Bail out > without touching registers that don't exist, and print a warning. > > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> Reviewed-by: Jani Nikula <jani.nikula@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_panel.c | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c > index e18b3f4..ef646b1 100644 > --- a/drivers/gpu/drm/i915/intel_panel.c > +++ b/drivers/gpu/drm/i915/intel_panel.c > @@ -521,6 +521,9 @@ static u32 _vlv_get_backlight(struct drm_device *dev, enum pipe pipe) > { > struct drm_i915_private *dev_priv = dev->dev_private; > > + if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B)) > + return 0; > + > return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK; > } > > @@ -602,6 +605,9 @@ static void vlv_set_backlight(struct intel_connector *connector, u32 level) > enum pipe pipe = intel_get_pipe_from_connector(connector); > u32 tmp; > > + if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B)) > + return; > + > tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK; > I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level); > } > @@ -717,6 +723,9 @@ static void vlv_disable_backlight(struct intel_connector *connector) > enum pipe pipe = intel_get_pipe_from_connector(connector); > u32 tmp; > > + if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B)) > + return; > + > intel_panel_actually_set_backlight(connector, 0); > > tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe)); > @@ -906,6 +915,9 @@ static void vlv_enable_backlight(struct intel_connector *connector) > enum pipe pipe = intel_get_pipe_from_connector(connector); > u32 ctl, ctl2; > > + if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B)) > + return; > + > ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe)); > if (ctl2 & BLM_PWM_ENABLE) { > DRM_DEBUG_KMS("backlight already enabled\n"); > -- > 2.0.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx