>-----Original Message----- >From: Intel-gfx [mailto:intel-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx] On Behalf Of >Rodrigo Vivi >Sent: Wednesday, October 29, 2014 12:16 AM >To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx >Cc: Vivi, Rodrigo >Subject: [PATCH 07/10] drm/i915: VLV/CHV PSR: Increase wait delay >time before active PSR. > >Since active function on VLV immediately activate PSR let's give more >time for idleness. > >Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> >--- > drivers/gpu/drm/i915/intel_dp.c | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > >diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c >index 6829ecb..ded73ae 100644 >--- a/drivers/gpu/drm/i915/intel_dp.c >+++ b/drivers/gpu/drm/i915/intel_dp.c >@@ -2666,6 +2666,11 @@ void intel_edp_psr_flush(struct drm_device *dev, > struct drm_i915_private *dev_priv = dev->dev_private; > struct drm_crtc *crtc; > enum pipe pipe; >+ /* On HSW/BDW Hardware controls idle_frames to go to PSR entry state >+ * However on VLV we go to PSR active state with psr work. So let's >+ * wait more time and let the user experience smoth enough. s/smoth/smooth otherwise looks fine.. >+ */ >+ int delay = msecs_to_jiffies(HAS_DDI(dev) ? 100 : 5000); > > mutex_lock(&dev_priv->psr.lock); > if (!dev_priv->psr.enabled) { >@@ -2688,8 +2693,7 @@ void intel_edp_psr_flush(struct drm_device *dev, > intel_edp_psr_exit(dev); > > if (!dev_priv->psr.active && !dev_priv->psr.busy_frontbuffer_bits) >- schedule_delayed_work(&dev_priv->psr.work, >- msecs_to_jiffies(100)); >+ schedule_delayed_work(&dev_priv->psr.work, delay); > mutex_unlock(&dev_priv->psr.lock); > } > >-- >1.9.3 > >_______________________________________________ >Intel-gfx mailing list >Intel-gfx@xxxxxxxxxxxxxxxxxxxxx >http://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
