On Tue, Nov 04, 2014 at 04:51:41AM -0800, Rodrigo Vivi wrote: > From: Deepak S <deepak.s@xxxxxxxxxxxxxxx> > > Higher RC6 residency is observed using timeout mode > instead of EI mode. It's Recommended to use TO Method for RC6. > [TOR:] My comments on the previous version of this patch are at http://lists.freedesktop.org/archives/intel-gfx/2014-August/050203.html Based on the understanding this patch will provide benefit on some pre-production CHV steppings and no benefit on the production CHV steppings, this patch should not be merged. > Signed-off-by: Deepak S <deepak.s@xxxxxxxxxxxxxxx> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_pm.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 7a69eba..0bfcd83 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -4348,7 +4348,7 @@ static void cherryview_enable_rps(struct drm_device *dev) > I915_WRITE(RING_MAX_IDLE(ring->mmio_base), 10); > I915_WRITE(GEN6_RC_SLEEP, 0); > > - I915_WRITE(GEN6_RC6_THRESHOLD, 50000); /* 50/125ms per EI */ > + I915_WRITE(GEN6_RC6_THRESHOLD, 0x557); > > /* allows RC6 residency counter to work */ > I915_WRITE(VLV_COUNTER_CONTROL, > @@ -4364,7 +4364,7 @@ static void cherryview_enable_rps(struct drm_device *dev) > /* 3: Enable RC6 */ > if ((intel_enable_rc6(dev) & INTEL_RC6_ENABLE) && > (pcbr >> VLV_PCBR_ADDR_SHIFT)) > - rc6_mode = GEN6_RC_CTL_EI_MODE(1); > + rc6_mode = GEN7_RC_CTL_TO_MODE; > > I915_WRITE(GEN6_RC_CONTROL, rc6_mode); > > -- > 1.9.3 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
