On Thu, Sep 04, 2014 at 12:27:42PM +0100, Damien Lespiau wrote: > We're going to add a new step, let's not hide the copy of the new WM > state inside one inner function, but as a 1st level operation in the WM > update. The new step being the flush which needs to compare the currnet and new ddb state to figure out how to perform the update. Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > v2: Split the staging results structure to not exceed the 1Kb stack > allocation in skl_update_wm() > > Signed-off-by: Damien Lespiau <damien.lespiau@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_pm.c | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 5425d85..7f7a2e2 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -3432,8 +3432,6 @@ static void skl_write_wm_values(struct drm_i915_private *dev_priv, > new->ddb.cursor[pipe].start); > } > } > - > - dev_priv->wm.skl_hw = *new; > } > > static bool skl_update_pipe_wm(struct drm_crtc *crtc, > @@ -3527,6 +3525,9 @@ static void skl_update_wm(struct drm_crtc *crtc) > > skl_update_other_pipe_wm(dev, crtc, &config, results); > skl_write_wm_values(dev_priv, results); > + > + /* store the new configuration */ > + dev_priv->wm.skl_hw = *results; > } > > static void > -- > 1.8.3.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
