Hi,
These set of patches build on top of the existing DSI Video mode support to
enable dual link MIPI panels with high resolutions. These patches have been
tested on a 25x16 panel and works well.
v2: Commit message added to all patches. All review comments of Jani, Nikula
have been addressed in the second version of patches.
Regards
Gaurav
Gaurav K Singh (11):
drm/i915: New functions added for enabling & disabling MIPI Port Ctrl
reg
drm/i915: MIPI Sequence to be sent to the DSI Controller based on the
port no from VBT
drm/i915: Cleanup in i915_reg.h for all MIPI regs.
drm/i915: Cleanup patch for MIPI regs
drm/i915: Add support for port enable/disable for dual link
configuration
drm/i915: Pixel Clock changes for DSI dual link
drm/i915: Dual link needs Shutdown and Turn on packet for both ports
drm/i915: Enable DSI PLL for both DSI0 and DSI1 in case of dual link
drm/i915: MIPI Timings related changes for dual link
drm/i915: Update the DSI disable path to support dual link panel
disabling
drm/i915: Update the DSI enable path to support dual link panel
enabling
drivers/gpu/drm/i915/i915_drv.h | 4 +
drivers/gpu/drm/i915/i915_reg.h | 103 +++---
drivers/gpu/drm/i915/intel_bios.h | 3 +-
drivers/gpu/drm/i915/intel_dsi.c | 472 ++++++++++++++++++----------
drivers/gpu/drm/i915/intel_dsi.h | 8 +
drivers/gpu/drm/i915/intel_dsi_cmd.c | 49 +--
drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 25 ++
drivers/gpu/drm/i915/intel_dsi_pll.c | 9 +-
8 files changed, 429 insertions(+), 244 deletions(-)
--
1.7.9.5
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
