Let's clear a bit the difference between enable_source and activate and explain it on comments and docs. After that we will be able to introduce inactivate/activate VLV+ functions Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> --- drivers/gpu/drm/i915/intel_dp.c | 34 +++++++++++++++++++++++++++++++--- 1 file changed, 31 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 335a711..813537a 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -2197,6 +2197,14 @@ static void vlv_edp_psr_enable_sink(struct intel_dp *intel_dp) DP_PSR_ENABLE); } +/** + * hsw_edp_psr_enable_sink - Enable PSR on Panel for HSW+. + * @intel_dp: DP struct + * + * This function enable PSR on Panel (Sink) side. + * On HSW+ platform when enabling PSR on Panel we need also to setup aux + * registers. + */ static void hsw_edp_psr_enable_sink(struct intel_dp *intel_dp) { struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); @@ -2262,6 +2270,16 @@ static void vlv_edp_psr_enable_source(struct intel_dp *intel_dp) VLV_EDP_PSR_ENABLE); } +/** + * hsw_edp_psr_enable_source - Enable PSR on Source. + * @intel_dp: DP struct + * + * This function enable PSR on Platform (Source) side. + * On HSW+ platform when enabling PSR on Source it also allow Hardware to + * immediately transitioning to PSR Entry/Active state as soon as it matches + * configure idle_frame count. So this function might be called only when + * we really can go to activate state. + */ static void hsw_edp_psr_enable_source(struct intel_dp *intel_dp) { struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); @@ -2336,7 +2354,13 @@ static bool intel_edp_psr_match_conditions(struct intel_dp *intel_dp) return true; } -static void intel_edp_psr_do_enable(struct intel_dp *intel_dp) +/** + * intel_edp_psr_activate - Activate PSR + * @intel_dp: DP struct + * + * This function allows PSR to go to Entry/Active state as soon as possible. + */ +static void intel_edp_psr_activate(struct intel_dp *intel_dp) { struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); struct drm_device *dev = intel_dig_port->base.base.dev; @@ -2346,7 +2370,11 @@ static void intel_edp_psr_do_enable(struct intel_dp *intel_dp) WARN_ON(dev_priv->psr.active); lockdep_assert_held(&dev_priv->psr.lock); - /* Enable/Re-enable PSR on the host */ + /* Enable/Re-enable PSR on the host + * On HSW/BDW after we enable PSR on source it will activate it + * as soon as it match configure idle_frame count. So + * we just actually enable it here on activation time. + */ hsw_edp_psr_enable_source(intel_dp); dev_priv->psr.active = true; @@ -2512,7 +2540,7 @@ static void intel_edp_psr_work(struct work_struct *work) if (dev_priv->psr.busy_frontbuffer_bits) goto unlock; - intel_edp_psr_do_enable(intel_dp); + intel_edp_psr_activate(intel_dp); unlock: mutex_unlock(&dev_priv->psr.lock); } -- 1.9.3 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx