On Tue, 28 Oct 2014, Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> wrote: > On Tue, Oct 28, 2014 at 01:32:01PM +0000, Siluvery, Arun wrote: >> On 28/10/2014 12:23, Ville Syrjälä wrote: >> > On Tue, Oct 28, 2014 at 11:57:50AM +0000, Arun Siluvery wrote: >> >> WaDisableInstructionShootdown:chv >> >> WaForceEnableNonCoherent:chv >> >> WaHdcDisableFetchWhenMasked:chv >> >> WaDisableFenceDestinationToSLM:chv (pre-production) >> >> >> >> s/WaDisableDopClockGating/WaDisableRowChickenDopClockGating, because another >> >> CHV WA is defined with the same name in intel_pm.c for a different reg. >> >> >> >> For: VIZ-4090 >> >> Signed-off-by: Arun Siluvery <arun.siluvery@xxxxxxxxxxxxxxx> >> >> --- >> >> drivers/gpu/drm/i915/i915_reg.h | 2 ++ >> >> drivers/gpu/drm/i915/intel_ringbuffer.c | 20 ++++++++++++++++++-- >> >> 2 files changed, 20 insertions(+), 2 deletions(-) >> >> >> >> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h >> >> index 77fce96..840e5d9 100644 >> >> --- a/drivers/gpu/drm/i915/i915_reg.h >> >> +++ b/drivers/gpu/drm/i915/i915_reg.h >> >> @@ -5024,6 +5024,7 @@ enum punit_power_well { >> >> /* GEN8 chicken */ >> >> #define HDC_CHICKEN0 0x7300 >> >> #define HDC_FORCE_NON_COHERENT (1<<4) >> >> +#define HDC_DONOT_FETCH_MEM_WHEN_MASKED (1<<11) >> >> #define HDC_FENCE_DEST_SLM_DISABLE (1<<14) >> >> >> >> /* WaCatErrorRejectionIssue */ >> >> @@ -5941,6 +5942,7 @@ enum punit_power_well { >> >> #define GEN9_DG_MIRROR_FIX_ENABLE (1<<5) >> >> >> >> #define GEN8_ROW_CHICKEN 0xe4f0 >> >> +#define INSTRUCTION_SHOOTDOWN_DISABLE (1<<9) >> >> #define PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE (1<<8) >> >> #define STALL_DOP_GATING_DISABLE (1<<5) >> >> >> >> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c >> >> index a8f72e8..2c07a02 100644 >> >> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c >> >> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c >> >> @@ -788,14 +788,30 @@ static int chv_init_workarounds(struct intel_engine_cs *ring) >> >> struct drm_i915_private *dev_priv = dev->dev_private; >> >> >> >> /* WaDisablePartialInstShootdown:chv */ >> >> + /* WaDisableInstructionShootdown:chv */ >> >> WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN, >> >> - PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE); >> >> + PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE | >> >> + (dev->pdev->revision < 0x06 ? >> >> + INSTRUCTION_SHOOTDOWN_DISABLE : 0)); >> > >> > I think we should just drop the current early pre-prod workarounds, and >> > not add more of them. >> > >> ok I will drop this. >> Is there any guideline on particular revision for bdw, chv below which >> we should drop that workaround? > > The usual rule is to drop all pre-prod w/as once we know what actually > is the first production stepping. But obviosuly it's still a bit too > early to do that on chv. At this time I would just drop all A step ones. Here's an idea. Make all pre-prod workarounds conditional to i915.preliminary_hw_support. Remove all pre-prod workarounds for a platform when that platform no longer requires i915.preliminary_hw_support. BR, Jani. -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx