On Wed, Sep 10, 2014 at 06:16:55PM +0300, Imre Deak wrote: > The legacy DRM suspend logic (effective in UMS) doesn't handle any S4 thaw > events so we don't need to care about it either. Only S3 suspend and S4 > freeze events are handled. Leave an assert behind to be sure. > > Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx> Looks correct. Although it the lack of .thaw() means there's no error recovery when things go south. But this is UMS so who cares. Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_drv.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c > index 2365875..f36e2d2 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -618,9 +618,9 @@ int i915_suspend(struct drm_device *dev, pm_message_t state) > return -ENODEV; > } > > - if (state.event == PM_EVENT_PRETHAW) > - return 0; > - > + if (WARN_ON_ONCE(state.event != PM_EVENT_SUSPEND && > + state.event != PM_EVENT_FREEZE)) > + return -EINVAL; > > if (dev->switch_power_state == DRM_SWITCH_POWER_OFF) > return 0; > -- > 1.8.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
