On Thu, Sep 25, 2014 at 07:06:20PM -0400, Rodrigo Vivi wrote: > bdw_sw_turbo is been enabled unconditionally and it is causing gpu to be busted. > GT freq stays on max value even when it is on idle or with screen off. > > And if this isn't actually the case it is at least breaking the current rps API. > So let's let it disabled by default for now until it is properly adressing the tests. > > References: https://bugs.freedesktop.org/show_bug.cgi?id=77869 > Cc: Daisy Sun <daisy.sun@xxxxxxxxx> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> Given Chris' feedback on that patch I guess I'll just revert it. Aside: When fixing up patches _always_ cite the offending commit. Thanks, Daniel > --- > drivers/gpu/drm/i915/i915_drv.h | 1 + > drivers/gpu/drm/i915/i915_params.c | 6 ++++++ > drivers/gpu/drm/i915/intel_pm.c | 2 +- > 3 files changed, 8 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index e845a81..159ddd8 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -2215,6 +2215,7 @@ struct i915_params { > int lvds_channel_mode; > int panel_use_ssc; > int vbt_sdvo_panel_type; > + int sw_turbo; > int enable_rc6; > int enable_fbc; > int enable_ppgtt; > diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c > index 139f490..1cd587c 100644 > --- a/drivers/gpu/drm/i915/i915_params.c > +++ b/drivers/gpu/drm/i915/i915_params.c > @@ -33,6 +33,7 @@ struct i915_params i915 __read_mostly = { > .lvds_channel_mode = 0, > .panel_use_ssc = -1, > .vbt_sdvo_panel_type = -1, > + .sw_turbo = 0, > .enable_rc6 = -1, > .enable_fbc = -1, > .enable_execlists = 0, > @@ -72,6 +73,11 @@ MODULE_PARM_DESC(semaphores, > "Use semaphores for inter-ring sync " > "(default: -1 (use per-chip defaults))"); > > +module_param_named(sw_turbo, i915.sw_turbo, int, 0400); > +MODULE_PARM_DESC(sw_turbo, > + "Use SW Turbo. Currently available only on Broadwell" > + "(default: 0 (disabled))"); > + > module_param_named(enable_rc6, i915.enable_rc6, int, 0400); > MODULE_PARM_DESC(enable_rc6, > "Enable power-saving render C-state 6. " > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 49af81f..d51b17d 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -3789,7 +3789,7 @@ static void gen8_enable_rps(struct drm_device *dev) > int unused; > > /* Use software Turbo for BDW */ > - dev_priv->rps.is_bdw_sw_turbo = IS_BROADWELL(dev); > + dev_priv->rps.is_bdw_sw_turbo = IS_BROADWELL(dev) && i915.sw_turbo; > > /* 1a: Software RC state - RC0 */ > I915_WRITE(GEN6_RC_STATE, 0); > -- > 1.9.3 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
