Again, PIPE_MISC has differences, but this dither set part is identical!
So:
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
On Thu, Sep 4, 2014 at 4:26 AM, Damien Lespiau <damien.lespiau@xxxxxxxxx> wrote:
From: Satheeshakrishna M <satheeshakrishna.m@xxxxxxxxx>
Pipe misc programming in gen9 is similar to BDW. Extending the BDW
implementation to gen 9.
Signed-off-by: Satheeshakrishna M <satheeshakrishna.m@xxxxxxxxx>
Signed-off-by: Damien Lespiau <damien.lespiau@xxxxxxxxx>
---
drivers/gpu/drm/i915/intel_display.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 6ad8098..bffabfd 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -7022,7 +7022,7 @@ static void haswell_set_pipeconf(struct drm_crtc *crtc)
I915_WRITE(GAMMA_MODE(intel_crtc->pipe), GAMMA_MODE_MODE_8BIT);
POSTING_READ(GAMMA_MODE(intel_crtc->pipe));
- if (IS_BROADWELL(dev)) {
+ if (IS_BROADWELL(dev) || INTEL_INFO(dev)->gen >= 9) {
val = 0;
switch (intel_crtc->config.pipe_bpp) {
--
1.8.3.1
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Rodrigo Vivi
Blog: http://blog.vivi.eng.br
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