On 4 September 2014 12:26, Damien Lespiau <damien.lespiau@xxxxxxxxx> wrote:
> Signed-off-by: Damien Lespiau <damien.lespiau@xxxxxxxxx>
Does the X tiling alignment value need to be set too?
A minor point, but perhaps use KB in the subject rather than Kb?
> ---
> drivers/gpu/drm/i915/intel_display.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 22d3902..02236f9 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -2199,7 +2199,9 @@ intel_pin_and_fence_fb_obj(struct drm_device *dev,
>
> switch (obj->tiling_mode) {
> case I915_TILING_NONE:
> - if (IS_BROADWATER(dev) || IS_CRESTLINE(dev))
> + if (INTEL_INFO(dev)->gen >= 9)
> + alignment = 256 * 1024;
> + else if (IS_BROADWATER(dev) || IS_CRESTLINE(dev))
> alignment = 128 * 1024;
> else if (INTEL_INFO(dev)->gen >= 4)
> alignment = 4 * 1024;
> --
> 1.8.3.1
>
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