After a GPU reset, we reinitialize RPS and RC6 state. (This may be unnecessary, they be preserved across the reset anyway...) Given that the GPU was active before the reset, it is likely that we do have a pending RPS work item and so we should simply disable it rather than emit a warn. Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> --- drivers/gpu/drm/i915/intel_pm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 9afdeed..3dea174 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3694,7 +3694,7 @@ static void gen8_enable_rps_interrupts(struct drm_device *dev) struct drm_i915_private *dev_priv = dev->dev_private; spin_lock_irq(&dev_priv->irq_lock); - WARN_ON(dev_priv->rps.pm_iir); + dev_priv->rps.pm_iir = 0; gen8_enable_pm_irq(dev_priv, dev_priv->rps.pm_events); I915_WRITE(GEN8_GT_IIR(2), dev_priv->rps.pm_events); spin_unlock_irq(&dev_priv->irq_lock); @@ -3705,7 +3705,7 @@ static void gen6_enable_rps_interrupts(struct drm_device *dev) struct drm_i915_private *dev_priv = dev->dev_private; spin_lock_irq(&dev_priv->irq_lock); - WARN_ON(dev_priv->rps.pm_iir); + dev_priv->rps.pm_iir = 0; gen6_enable_pm_irq(dev_priv, dev_priv->rps.pm_events); I915_WRITE(GEN6_PMIIR, dev_priv->rps.pm_events); spin_unlock_irq(&dev_priv->irq_lock); -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
