Hi Daniel, Due to 2014Q3 release testing circle this week, QA will do this test in next week. Thanks --Sun, Yi > -----Original Message----- > From: Daniel Vetter [mailto:daniel.vetter@xxxxxxxx] > Sent: Friday, September 5, 2014 9:16 PM > To: Sun, Yi > Cc: intel-gfx@xxxxxxxxxxxxxxxxxxxxx; Daniel Vetter; Jani Nikula > Subject: Updated drm-intel-testing > > Hi all, > > New -testing cycle with cool stuff: > - final bits (again) for the rotation support (Sonika Jindal) > - support bl_power in the intel backlight (Jani) > - vdd handling improvements from Ville > - i830M fixes from Ville > - piles of prep work all over to make skl enabling just plug in (Damien, Sonika) > - rename DP training defines to reflect latest edp standards, this touches all > drm drivers supporting DP (Sonika Jindal) > - cache edids during single detect cycle to avoid re-reading it for e.g. audio, > from Chris > - move w/a for registers which are stored in the hw context to the context init > code (Arun&Damien) > - edp panel power sequencer fixes, helps chv a lot (Ville) > - piles of other chv fixes all over > - much more paranoid pageflip handling with stall detection and better > recovery > from Chris > - small things all over, as usual > > Happy testing! > > Cheers, Daniel > > -- > Daniel Vetter > Software Engineer, Intel Corporation > +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
