Re: [PATCH] drm/i915: Wait for vblank before enabling the TV encoder

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On Mon, 08 Sep 2014, ville.syrjala@xxxxxxxxxxxxxxx wrote:
> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>
> The vblank waits in intel_tv_detect_type() are timing out for some
> reason. This is a regression caused removing seemingly useless vblank
> waits from the modeset seqeuence in:
>
>  commit 56ef52cad5e37fca89638e4bad598a994ecc3d9f
>  Author: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>  Date:   Thu May 8 19:23:15 2014 +0300
>
>     drm/i915: Kill vblank waits after pipe enable on gmch platforms
>
> So it turns out they weren't all entirely useless. Apparently the pipe
> has to go through one full frame before we enable the TV port. Add a
> vblank wait to intel_enable_tv() to make sure that happens.
>
> Another approach was attempted by placing the vblank wait just after
> enabling the port. The theory behind that attempt was that we need to
> let the port stay enabled for one full frame before disabling it again
> during load detection. But that didn't work, and we definitely must
> have the vblank wait before enabling the port.
>
> Cc: stable@xxxxxxxxxxxxxxx
> Cc: Alan Bartlett <ajb@xxxxxxxxxx>
> Tested-by: Alan Bartlett <ajb@xxxxxxxxxx>
> Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=79311
> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>

Pushed to drm-intel-fixes with Daniel's IRC r-b. Thanks for the patch
and review.

BR,
Jani.


> ---
>  drivers/gpu/drm/i915/intel_tv.c | 4 ++++
>  1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
> index c69d3ce..c14341c 100644
> --- a/drivers/gpu/drm/i915/intel_tv.c
> +++ b/drivers/gpu/drm/i915/intel_tv.c
> @@ -854,6 +854,10 @@ intel_enable_tv(struct intel_encoder *encoder)
>  	struct drm_device *dev = encoder->base.dev;
>  	struct drm_i915_private *dev_priv = dev->dev_private;
>  
> +	/* Prevents vblank waits from timing out in intel_tv_detect_type() */
> +	intel_wait_for_vblank(encoder->base.dev,
> +			      to_intel_crtc(encoder->base.crtc)->pipe);
> +
>  	I915_WRITE(TV_CTL, I915_READ(TV_CTL) | TV_ENC_ENABLE);
>  }
>  
> -- 
> 1.8.5.5
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Technology Center
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