DP_AUX_CTL doesn't have the "2X Bit Clock divider" bitfield any more. I
don't see any other register where we should program it, so I assume the
hardware knows how to derive it now.
Signed-off-by: Damien Lespiau <damien.lespiau@xxxxxxxxx>
---
drivers/gpu/drm/i915/intel_dp.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index dc7440e..6b1da40 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -446,7 +446,10 @@ static uint32_t ilk_get_aux_clock_divider(struct intel_dp *intel_dp, int index)
struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
struct drm_device *dev = intel_dig_port->base.base.dev;
- if (index)
+ if (INTEL_INFO(dev)->gen >= 9) {
+ /* Skylake doesn't need the AUX clock divider programmed */
+ return 0;
+ } else if (index)
return 0;
if (intel_dig_port->port == PORT_A) {
--
1.8.3.1
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