Re: [PATCH 4/4] drm/i915: Check of !HAS_PCH_SPLIT() in PCH transcoder funcs

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On Wed, Sep 03, 2014 at 02:09:53PM +0300, ville.syrjala@xxxxxxxxxxxxxxx wrote:
> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> 
> Check for !HAS_PCH_SPLIT() instead of 'gen < 5' in the PCH transcoder
> enable functions.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>

All four patches from this series merged, thanks.
-Daniel

> ---
>  drivers/gpu/drm/i915/intel_display.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 0b9c9e0..a53954c 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -1864,7 +1864,7 @@ static void ironlake_enable_pch_transcoder(struct drm_i915_private *dev_priv,
>  	uint32_t reg, val, pipeconf_val;
>  
>  	/* PCH only available on ILK+ */
> -	BUG_ON(INTEL_INFO(dev)->gen < 5);
> +	BUG_ON(!HAS_PCH_SPLIT(dev));
>  
>  	/* Make sure PCH DPLL is enabled */
>  	assert_shared_dpll_enabled(dev_priv,
> @@ -1917,7 +1917,7 @@ static void lpt_enable_pch_transcoder(struct drm_i915_private *dev_priv,
>  	u32 val, pipeconf_val;
>  
>  	/* PCH only available on ILK+ */
> -	BUG_ON(INTEL_INFO(dev_priv->dev)->gen < 5);
> +	BUG_ON(!HAS_PCH_SPLIT(dev_priv->dev));
>  
>  	/* FDI must be feeding us bits for PCH ports */
>  	assert_fdi_tx_enabled(dev_priv, (enum pipe) cpu_transcoder);
> -- 
> 1.8.5.5
> 
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> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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