On Mon, Sep 01, 2014 at 02:29:47PM +0100, Arun Siluvery wrote: > kernel patch that exports w/a data to debugfs is reworked so > update igt accordingly. > > Address review comments from Damien. > - if kernel is not exposing w/a data instead of failing just skip instead. > - if the platform is not exposing w/a table then no of workarounds > applied are 0; we can use this data to skip platform checks. > > Signed-off-by: Arun Siluvery <arun.siluvery@xxxxxxxxxxxxxxx> > --- > tests/gem_workarounds.c | 44 +++++++++++++++++++++++--------------------- > 1 file changed, 23 insertions(+), 21 deletions(-) > > diff --git a/tests/gem_workarounds.c b/tests/gem_workarounds.c > index 32156d2..fae4382 100644 > --- a/tests/gem_workarounds.c > +++ b/tests/gem_workarounds.c > @@ -62,7 +62,7 @@ int drm_fd; > uint32_t devid; > static drm_intel_bufmgr *bufmgr; > struct intel_batchbuffer *batch; > -int num_wa_regs; > +int num_wa_regs = 0; > struct intel_wa_reg *wa_regs; > > > @@ -153,7 +153,7 @@ static void check_workarounds(enum operation op, int num) > igt_info("Address\tbefore\t\tafter\t\tw/a mask\tresult\n"); > for (i = 0; i < num; ++i) { > status = (current_wa[i].value & current_wa[i].mask) != > - (wa_regs[i].value & wa_regs[i].mask); > + wa_regs[i].mask; Hum. This looks so fishy it can't be right. The heart of the problem is that you're not clear what a mask or value should be. To me: - A mask selects bits - value is the reference W/A value (containing only the correct bits for a single W/A, some of those bits can be 0, mask is telling us which bits we're interested about. - read(reg) & mask is the W/A value read back from the register -- Damien _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx