On Fri, Aug 15, 2014 at 09:09:10PM +0300, Mika Kuoppala wrote: > Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> writes: > > > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > > Reviewed-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxx> Ok, pulled in the error state fixes Mika reviewed, thanks. Now the big question: Is the s/seqno/request/ patch ready for prime-time? ... I'll probably known the answer once I'm through with my intel-gfx backlog ... Cheers, Daniel > > > --- > > drivers/gpu/drm/i915/i915_gpu_error.c | 5 ++++- > > 1 file changed, 4 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c > > index 726e6b1..1e05414 100644 > > --- a/drivers/gpu/drm/i915/i915_gpu_error.c > > +++ b/drivers/gpu/drm/i915/i915_gpu_error.c > > @@ -577,7 +577,10 @@ i915_error_object_create(struct drm_i915_private *dev_priv, > > if (dst == NULL) > > return NULL; > > > > - dst->gtt_offset = i915_gem_obj_offset(src, vm); > > + if (i915_gem_obj_bound(src, vm)) > > + dst->gtt_offset = i915_gem_obj_offset(src, vm); > > + else > > + dst->gtt_offset = -1; > > > > reloc_offset = dst->gtt_offset; > > use_ggtt = (src->cache_level == I915_CACHE_NONE && > > -- > > 1.9.1 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
