On Fri, May 23, 2014 at 08:48:08AM +0200, Daniel Vetter wrote: > - Apply the batch offset bias everywhere but mention that we've only > observed it on gen7 gpus. > +static struct drm_i915_gem_object * > +eb_get_batch(struct eb_vmas *eb) > +{ > + struct i915_vma *vma = list_entry(eb->vmas.prev, typeof(*vma), exec_list); > + > + /* > + * SNA is doing fancy tricks with compressing batch buffers, which leads > + * to negative relocation deltas. Usually that works out ok since the > + * relocate address is still positive, except when the batch is placed > + * very low in the GTT. Ensure this doesn't happen. > + * > + * Note that actual hangs have only been observed on gen7, but for > + * paranoia do it everywhere. > + */ > + vma->exec_entry->flags |= __EXEC_OBJECT_NEEDS_BIAS; This actually conflicts with ilk and earlier generating EBUSY when mixed with pinned buffers. -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx