On Sat, Jul 12, 2014 at 07:18:30PM +0530, Deepak S wrote: > > On Saturday 28 June 2014 04:33 AM, ville.syrjala@xxxxxxxxxxxxxxx wrote: > >From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > > >In > > commit 62942ed7279d3e06dc15ae3d47665eff3b373327 > > Author: Jesse Barnes <jbarnes@xxxxxxxxxxxxxxxx> > > Date: Fri Jun 13 09:28:33 2014 -0700 > > > > drm/i915/vlv: disable PPGTT on early revs v3 > > > >we forgot about CHV. IS_VALLEYVIEW() is true for CHV, so we need to > >explicitly avoid disabling PPGTT on CHV. > > > >Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > >--- > > drivers/gpu/drm/i915/i915_gem_gtt.c | 3 ++- > > 1 file changed, 2 insertions(+), 1 deletion(-) > > > >diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c > >index a4153ee..5188936 100644 > >--- a/drivers/gpu/drm/i915/i915_gem_gtt.c > >+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c > >@@ -64,7 +64,8 @@ static int sanitize_enable_ppgtt(struct drm_device *dev, int enable_ppgtt) > > #endif > > /* Early VLV doesn't have this */ > >- if (IS_VALLEYVIEW(dev) && dev->pdev->revision < 0xb) { > >+ if (IS_VALLEYVIEW(dev) && !IS_CHERRYVIEW(dev) && > >+ dev->pdev->revision < 0xb) { > > DRM_DEBUG_DRIVER("disabling PPGTT on pre-B3 step VLV\n"); > > return 0; > > } > > Reviewed-by: Deepak S <deepak.s@xxxxxxxxxxxxxxx> Queued for -next, thanks for the patch. -Daniel > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx