On Tue, Jul 08, 2014 at 12:15:31AM +0200, Jiri Kosina wrote:
> On Mon, 7 Jul 2014, Chris Wilson wrote:
>
> > > > this patch on top of v3.16-rc3-62-gd92a333 makes the resume from ram
> > > > regression go away on my machine:
> > >
> > > Hm, we could conditionalize this hack on IS_G4X ... Chris, thoughts?
> >
> > As different machines favour different w/a, I think the issue is mostly
> > timing related. It could be sequence of register writes, but we tried
> > different orders early on. The next experiment I guess would be to
> > insert small delays between each write to see if that helps. Or to write
> > each register twice.
>
> I actually tried to introduce rather large delays between individual
> I915_WRITE() calls in the ring initialization sequence a couple weeks ago
> already, but it resulted in complete machine lockup (which is worse than
> my usual symptoms) during resume. Therefore I probably lack the knowledge
> of internal workings of the HW that would allow me to guess what the
> reasonable timeout value should be.
>
> Willing to test any patches.
Are you using the extra patches on bug 76554? If not, try
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index e18ed05dc0d5..48326f9628d4 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -526,6 +526,9 @@ static int init_ring_common(struct intel_engine_cs *ring)
((ringbuf->size - PAGE_SIZE) & RING_NR_PAGES)
| RING_VALID);
+ I915_WRITE_HEAD(ring, 0);
+ (void)I915_READ_HEAD(ring);
+
/* If the head is still not zero, the ring is dead */
if (wait_for((I915_READ_CTL(ring) & RING_VALID) != 0 &&
I915_READ_START(ring) == i915_gem_obj_ggtt_offset(obj) &&
--
Chris Wilson, Intel Open Source Technology Centre
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