On Tue, Jul 01, 2014 at 05:24:23PM +0100, daniele.ceraolospurio@xxxxxxxxx wrote: > From: Daniele Ceraolo Spurio <daniele.ceraolospurio@xxxxxxxxx> > > These callbacks can be assigned to specific functions inside an external > validation kernel module. This module can then extract run-time > information to make sure everything is working as expected. > > Specifically, these two callbacks extract information about full PPGTT > and batch dispatch. > > Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@xxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_gem_context.c | 3 +++ > drivers/gpu/drm/i915/i915_gem_execbuffer.c | 3 +++ > drivers/gpu/drm/i915/i915_trace.h | 22 ++++++++++++++++++++++ > 3 files changed, 28 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c > index 99f7022..120a319 100644 > --- a/drivers/gpu/drm/i915/i915_gem_context.c > +++ b/drivers/gpu/drm/i915/i915_gem_context.c > @@ -90,6 +90,9 @@ > #include "i915_drv.h" > #include "i915_trace.h" > > +i915_ppgtt_validation_callback_t ppgtt_validation_callback = NULL; > +EXPORT_SYMBOL_GPL(ppgtt_validation_callback); > + > /* This is a HW constraint. The value below is the largest known requirement > * I've seen in a spec to date, and that was a workaround for a non-shipping > * part. It should be safe to decrease this, but it's more future proof as is. > diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c > index 0b2b76e..7feb977 100644 > --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c > +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c > @@ -33,6 +33,9 @@ > #include "intel_drv.h" > #include <linux/dma_remapping.h> > > +i915_gem_ring_dispatch_callback_t i915_gem_ring_dispatch_validation_callback = NULL; > +EXPORT_SYMBOL_GPL(i915_gem_ring_dispatch_validation_callback); > + > #define __EXEC_OBJECT_HAS_PIN (1<<31) > #define __EXEC_OBJECT_HAS_FENCE (1<<30) > #define __EXEC_OBJECT_NEEDS_BIAS (1<<28) > diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h > index 4e73e3a..98c6f47 100644 > --- a/drivers/gpu/drm/i915/i915_trace.h > +++ b/drivers/gpu/drm/i915/i915_trace.h > @@ -15,6 +15,18 @@ > #define TRACE_SYSTEM_STRING __stringify(TRACE_SYSTEM) > #define TRACE_INCLUDE_FILE i915_trace > > +/* validation callbacks */ > + > +typedef void (*i915_ppgtt_validation_callback_t)(unsigned int action_code, > + struct i915_hw_ppgtt *ppgtt); > +extern i915_ppgtt_validation_callback_t ppgtt_validation_callback; > + > +typedef void (*i915_gem_ring_dispatch_callback_t)(struct intel_engine_cs *ring, > + u32 seqno, > + u32 flags, > + struct intel_context *ctx); > +extern i915_gem_ring_dispatch_callback_t i915_gem_ring_dispatch_validation_callback; > + > /* pipe updates */ > > TRACE_EVENT(i915_pipe_update_start, > @@ -371,6 +383,10 @@ TRACE_EVENT(i915_gem_ring_dispatch, > __entry->flags = flags; > __entry->vm = ctx->vm; > i915_trace_irq_get(ring, seqno); > + > + if (i915_gem_ring_dispatch_validation_callback) > + i915_gem_ring_dispatch_validation_callback(ring, > + seqno, flags, ctx); Nack on two grounds: - I already get flames for the irq_get in here from the tracepoint maintainer - he really doesn't like us adding randome stuff with side-effects here. - If we want extended validation interfaces we should upstream those, not just the hooks. Cheers, Daniel > ), > > TP_printk("dev=%u, ring=%u, seqno=%u, flags=%x, vm=%p", > @@ -607,6 +623,9 @@ TRACE_EVENT(create_vm_for_ctx, > __entry->vm = &ppgtt->base; > __entry->dev = ppgtt->base.dev->primary->index; > __entry->pid = (unsigned int)task_pid_nr(current); > + > + if (ppgtt_validation_callback) > + ppgtt_validation_callback(0, ppgtt); > ), > > TP_printk("dev=%u, task_pid=%u, vm=%p", > @@ -627,6 +646,9 @@ TRACE_EVENT(ppgtt_release, > TP_fast_assign( > __entry->vm = &ppgtt->base; > __entry->dev = ppgtt->base.dev->primary->index; > + > + if (ppgtt_validation_callback) > + ppgtt_validation_callback(1, ppgtt); > ), > > TP_printk("dev=%u, vm=%p", __entry->dev, __entry->vm) > -- > 1.8.5.2 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx