On Tue, Jun 24, 2014 at 12:29:45PM +0000, Mateo Lozano, Oscar wrote: > > -----Original Message----- > > From: Volkin, Bradley D > > Sent: Monday, June 23, 2014 8:10 PM > > To: Mateo Lozano, Oscar > > Cc: Chris Wilson; intel-gfx@xxxxxxxxxxxxxxxxxxxxx > > Subject: Re: [PATCH 26/53] drm/i915/bdw: New logical ring > > submission mechanism > > There are 3 cases of non-execbuffer submissions that I can think of: flips, > > render state, and clear-buffer (proposed patches on the list). I wonder if the > > right approach might be to use batchbuffers with a small wrapper around the > > dispatch_execbuffer/emit_bb_start vfuncs. Basically the rule would be to > > only touch a ringbuffer from within the intel_engine_cs vfuncs, which always > > know which set of functions to use. > > > > For flips, we could use MMIO flips. Render state already uses the existing > > dispatch_execbuffer() and add_request(). The clear code could potentially do > > the same. There would obviously be some overhead in using a batch buffer > > for what could end up being just a few commands. Perhaps the batch buffer > > pool code from the command parser would help though. > > This has another positive side-effect: the scheduler guys do not like > things inside the ring without a proper batchbuffer & request, because > it makes their life more complex. I'm probably missing all the context here but I've thought this is the plan forward: We'll use mmio flips with execlists and otherwise we'll submit everything with the right context/engine whaterever using execlist-specific functions. Since the gpu clear code isn't merged yet we can imo ignore it for now and merge execlists first. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
