Re: [PATCH 00/19] ddi: respin of runtime PM for DPMS

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2014-06-25 16:01 GMT-03:00 Imre Deak <imre.deak@xxxxxxxxx>:
> This is a respin of the unmerged part of Daniel's runtime PM for DPMS
> patchset [1]. The original one also included a refactoring of the DDI
> PCH/CRT encoder modesetting path, I left the corresponding patches out
> from this series. This is because there hasn't been yet an agreement on
> those parts, but people would like to see the RPM DPMS support already
> applied.
>
> Some patches needed to be updated/rebased because of the above omission,
> but these weren't anywhere significant so I just marked the fact
> with my s-o-b line. I also added two minor change to keep the
> modeset sequence at its current order and collected all the reviewed-by
> lines.
>
> Tested on HSW DP/VGA, with basic DPMS on/off and igt/pm_rpm.

For patches 2, 4, 5, 6, 7, 19: Reviewed-by: Paulo Zanoni
<paulo.r.zanoni@xxxxxxxxx>

However, I tested these patches on a HSW Machine with eDP+HDMI, and
there are WARNs on dmesg for the dpms-non-lpsp subtest. I found at
least two problems:
1 - Function hsw_ddi_pll_get_hw_state() reads registers while the
device is suspended.
2 - When _intel_set_mode() calls intel_crtc_disable(), it calls
assert_plane() which reads register 0x71180, which triggers an
"Unclaimed register" error. I didn't investigate this deeply, so I
don't have a suggestion for a solution.

I can reproduce these errors 100% of the time.

>
> [1]
> http://lists.freedesktop.org/archives/intel-gfx/2014-April/044179.html
>
> Daniel Vetter (17):
>   drm/i915: Check hw state in assert_can_disable_lcpll
>   drm/i915: Remove spll_refcount for hsw
>   drm/i915: Clean up WRPLL/SPLL #defines
>   drm/i915: Move the SPLL enabling into hsw_crt_pre_enable
>   drm/i915: Move SPLL disabling into hsw_crt_post_disable
>   drm/i915: Add a debugfs file for the shared dpll state
>   drm/i915: Move ddi_pll_sel into the pipe config
>   drm/i915: State readout and cross-checking for ddi_pll_sel
>   drm/i915: Precompute static ddi_pll_sel values in encoders
>   drm/i915: Basic shared dpll support for WRPLLs
>   drm/i915: Document that the pll->mode_set hook is optional
>   drm/i915: State readout support for WRPLLs
>   drm/i915: ->disable hook for WRPLLs
>   drm/i915: ->enable hook for WRPLLs
>   drm/i915: Switch to common shared dpll framework for WRPLLs
>   drm/i915: Only touch WRPLL hw state in enable/disable hooks
>   drm/i915: ddi: enable runtime pm during dpms
>
> Imre Deak (2):
>   drm/i915: ddi: move pch setup after encoder->pre_enable
>   drm/i915: ddi: move pch cleanup before encoder->post_disable
>
>  drivers/gpu/drm/i915/i915_debugfs.c  |  27 +++
>  drivers/gpu/drm/i915/i915_drv.h      |  16 +-
>  drivers/gpu/drm/i915/i915_reg.h      |  10 +-
>  drivers/gpu/drm/i915/intel_crt.c     |  32 +++-
>  drivers/gpu/drm/i915/intel_ddi.c     | 340 +++++++----------------------------
>  drivers/gpu/drm/i915/intel_display.c | 157 +++++++++-------
>  drivers/gpu/drm/i915/intel_dp.c      |  23 ++-
>  drivers/gpu/drm/i915/intel_drv.h     |  14 +-
>  8 files changed, 258 insertions(+), 361 deletions(-)
>
> --
> 1.8.4
>
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> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Paulo Zanoni
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