On 06/19/2014 03:37 PM, Daniel Vetter wrote:
On Thu, Jun 19, 2014 at 03:34:34PM +0300, Ander Conselvan de Oliveira wrote:
From: Rob Bradford <rob@xxxxxxxxxxxxxxx>
The aim is that this is functionally equivalent to using the
I915_GEM_MMAP ioctl.
v2: Add aperture check limit, limit to SNB+ and improve error handling.
v3 (anderco): Map without using the GTT.
Why that? This means you'll have a non-coherent mapping and atm dma-buf
doesn't expose and invalidate/flushing ioctls. Which really you want for
this.
Hmm. I completely overlooked that important detail. In a discussion with
Rob, we came to the conclusion we didn't want to use the GTT because of
the performance penalty. Now I see that just modifying the mmap()
support is not enough.
Thanks,
Ander
-Daniel
Signed-off-by: Rob Bradford <rob@xxxxxxxxxxxxxxx>
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@xxxxxxxxx>
---
drivers/gpu/drm/i915/i915_gem_dmabuf.c | 19 ++++++++++++++++++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_dmabuf.c b/drivers/gpu/drm/i915/i915_gem_dmabuf.c
index 580aa42..2d31fca 100644
--- a/drivers/gpu/drm/i915/i915_gem_dmabuf.c
+++ b/drivers/gpu/drm/i915/i915_gem_dmabuf.c
@@ -193,7 +193,24 @@ static void i915_gem_dmabuf_kunmap(struct dma_buf *dma_buf, unsigned long page_n
static int i915_gem_dmabuf_mmap(struct dma_buf *dma_buf, struct vm_area_struct *vma)
{
- return -EINVAL;
+ struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
+ struct drm_device *dev = obj->base.dev;
+ struct drm_i915_private *dev_priv = dev->dev_private;
+ int ret;
+
+ if (INTEL_INFO(dev)->gen < 6)
+ return -EINVAL;
+
+ ret = i915_mutex_lock_interruptible(dev);
+ if (ret)
+ return ret;
+
+ ret = obj->base.filp->f_op->mmap(obj->base.filp, vma);
+ fput(vma->vm_file);
+ vma->vm_file = get_file(obj->base.filp);
+
+ mutex_unlock(&dev->struct_mutex);
+ return ret;
}
static int i915_gem_begin_cpu_access(struct dma_buf *dma_buf, size_t start, size_t length, enum dma_data_direction direction)
--
1.8.3.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
