On Thu, Jun 19, 2014 at 02:41:27PM +0200, Daniel Vetter wrote:
> @@ -3626,6 +3628,8 @@ i915_gem_object_set_to_gtt_domain(struct drm_i915_gem_object *obj, bool write)
> obj->dirty = 1;
> }
>
> + intel_fb_obj_invalidate(obj, NULL);
We should only invalidate when we start writing.
> +
> trace_i915_gem_object_change_domain(obj,
> old_read_domains,
> old_write_domain);
> @@ -3962,6 +3966,8 @@ i915_gem_object_set_to_cpu_domain(struct drm_i915_gem_object *obj, bool write)
> obj->base.write_domain = I915_GEM_DOMAIN_CPU;
> }
>
> + intel_fb_obj_invalidate(obj, NULL);
Again only for writes. Now I think that this is skippable as the CPU
domain is explicitly incoherent with display, but for symmetry of
invalidate/flush it is required.
> +
> trace_i915_gem_object_change_domain(obj,
> old_read_domains,
> old_write_domain);
> +void intel_frontbuffer_flush(struct drm_device *dev,
> + unsigned frontbuffer_bits)
> +{
> + struct drm_i915_private *dev_priv = dev->dev_private;
> +
> + /* Delay flushing when rings are still busy.*/
> + mutex_lock(&dev_priv->fb_tracking.lock);
> + frontbuffer_bits &= ~dev_priv->fb_tracking.busy_bits;
> + mutex_unlock(&dev_priv->fb_tracking.lock);
> +
> + intel_mark_fb_busy(dev, frontbuffer_bits, NULL);
> +
> + intel_edp_psr_exit(dev);
Please tell me to plan to change this functions name. As we certainly
don't want to disable PSR here, but hopefully reenable it.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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