From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
FBC host modification tracking only works through GTT mmaps, so any
direct CPU access needs to manually nuke the compressed framebuffer
on modifications. Do the nuking from the SW_FINISH ioctl.
v2: nuke from SW_FINISH insted of DIRTYFB ioctl
v3: Call intel_fbc_nuke() only when pin_display is true
v4: Don't oops if dev_priv->fbc.fb is NULL
v5: Rework based on fbc.mutex and fbc.obj
Reviewed-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
---
drivers/gpu/drm/i915/i915_gem.c | 8 ++++++++
drivers/gpu/drm/i915/intel_drv.h | 1 +
drivers/gpu/drm/i915/intel_pm.c | 31 +++++++++++++++++++++++++++++++
3 files changed, 40 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 0ce66da..a1753dc 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1434,6 +1434,7 @@ int
i915_gem_sw_finish_ioctl(struct drm_device *dev, void *data,
struct drm_file *file)
{
+ struct drm_i915_private *dev_priv = dev->dev_private;
struct drm_i915_gem_sw_finish *args = data;
struct drm_i915_gem_object *obj;
int ret = 0;
@@ -1457,6 +1458,13 @@ i915_gem_sw_finish_ioctl(struct drm_device *dev, void *data,
drm_gem_object_unreference(&obj->base);
unlock:
mutex_unlock(&dev->struct_mutex);
+
+ if (ret == 0) {
+ mutex_lock(&dev_priv->fbc.mutex);
+ intel_fbc_nuke(obj);
+ mutex_unlock(&dev_priv->fbc.mutex);
+ }
+
return ret;
}
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index e9de8b1..161639b 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -977,6 +977,7 @@ void intel_fbc_post_plane_enable(struct intel_crtc *crtc);
void intel_fbc_disable(struct intel_crtc *crtc);
void intel_fbc_schedule_update(struct drm_device *dev);
struct intel_crtc *intel_fbc_best_crtc(struct drm_device *dev);
+void intel_fbc_nuke(struct drm_i915_gem_object *obj);
void intel_gpu_ips_init(struct drm_i915_private *dev_priv);
void intel_gpu_ips_teardown(void);
int intel_power_domains_init(struct drm_i915_private *);
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 3bde3ce..f3d76aa 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -362,6 +362,37 @@ void intel_fbc_disable(struct intel_crtc *crtc)
__intel_fbc_disable(crtc);
}
+void intel_fbc_nuke(struct drm_i915_gem_object *obj)
+{
+ struct drm_device *dev = obj->base.dev;
+ struct drm_i915_private *dev_priv = dev->dev_private;
+ struct intel_crtc *crtc = dev_priv->fbc.crtc;
+ unsigned int pending_score;
+ int ret;
+
+ lockdep_assert_held(&dev_priv->fbc.mutex);
+
+ if (dev_priv->fbc.obj != obj)
+ return;
+
+ if (!crtc)
+ return;
+
+ WARN_ON(crtc->fbc.pending_score == 0);
+
+ pending_score = crtc->fbc.pending_score;
+ intel_fbc_disable(crtc);
+ crtc->fbc.pending_score = pending_score;
+
+ /*
+ * Must wait until the next vblank before re-enabling
+ * otherwise the nuking won't actually happen.
+ */
+ crtc->fbc.notify.vbl_count = intel_crtc_vbl_count_rel_to_abs(crtc, 1);
+ ret = intel_vblank_notify_add(crtc, &crtc->fbc.notify);
+ WARN_ON(ret != 0);
+}
+
static bool set_no_fbc_reason(struct drm_i915_private *dev_priv,
enum no_fbc_reason reason)
{
--
1.8.5.5
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