From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> The FBC RT address is stored in the context, and thus needs to be rewritten after a context switch before any batches are run. We emit the LRI to update the FBC RT address when we call the ring ->flush function to invalidate the caches. When a context switch is being performed we currently do the invalidate before the context switch, which means we're not updating the FBC RT address correctly. Move the i915_gem_execbuffer_move_to_gpu() call to happen after i915_switch_context() to make the LRI happen after the MI_SET_CONTEXT. v2: Rebased Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> --- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c index 5a91dae..7a328f6 100644 --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c @@ -1351,11 +1351,11 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data, i915_gem_execbuffer_mark_fbc_dirty(ring, &eb->vmas); - ret = i915_gem_execbuffer_move_to_gpu(ring, &eb->vmas); + ret = i915_switch_context(ring, ctx); if (ret) goto err; - ret = i915_switch_context(ring, ctx); + ret = i915_gem_execbuffer_move_to_gpu(ring, &eb->vmas); if (ret) goto err; -- 1.8.5.5 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
