From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Things should work just fine now for FBC2 platforms. However on g4x we
don't have any code to set up the FBC watermarks so I'm hesitant to
enable it there by default. FBC1 platforms could use more testing, and
also my 855 seems to experience some GPU+system hangs occasionally when
FBC is enabled. So FBC1 seems to need further investigations.
Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
---
drivers/gpu/drm/i915/intel_pm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index f3d76aa..ecfb6ab 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -776,7 +776,7 @@ struct intel_crtc *intel_fbc_best_crtc(struct drm_device *dev)
return NULL;
}
- if (i915.enable_fbc < 0) {
+ if (i915.enable_fbc < 0 && INTEL_INFO(dev)->gen < 5) {
if (set_no_fbc_reason(dev_priv, FBC_CHIP_DEFAULT))
DRM_DEBUG_KMS("fbc disabled per chip default\n");
return NULL;
--
1.8.5.5
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
