On Tue, Jun 17, 2014 at 10:59:42AM +0530, akash.goel@xxxxxxxxx wrote: > From: Akash Goel <akash.goel@xxxxxxxxx> > > This adds support for a write-enable bit in the entry of GTT. > This is handled via a read-only flag in the GEM buffer object which > is then used to see how to set the bit when writing the GTT entries. > Currently by default the Batch buffer & Ring buffers are marked as read only. > > v2: Moved the pte override code for read-only bit to 'byt_pte_encode'. (Chris) > Fixed the issue of leaving 'gt_old_ro' as unused. (Chris) > > v3: Removed the 'gt_old_ro' field, now setting RO bit only for Ring Buffers(Daniel). > > v4: Added a new 'flags' parameter to all the pte(gen6) encode & insert_entries functions, > in lieu of overloading the cache_level enum (Daniel). > > v5: Removed the superfluous VLV check & changed the definition location of PTE_READ_ONLY flag (Imre) > > Reviewed-by: Imre Deak <imre.deak@xxxxxxxxx> > Signed-off-by: Akash Goel <akash.goel@xxxxxxxxx> Queued for -next, thanks for the patch. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
