Hi Ville, dear Intel-experts,
again reporting problems with the i830GM chipset. Now that I had a
working output on the S6010, I no longer have a working VGA output on
the IBM R31. The R31 uses the same chipset, but LVDS instead of DVI to
drive its internal panel. With the latest drm-intel-nightly on the
machine, the VGA output either stays completely black, or remains a
clone of the internal display. xrandr no longer shows VGA as an output,
only LVDS.
[NEEDLESS TO SAY THAT I HAD TO FIX THE ^$#@!!! watermark registers ONCE
AGAIN for the drm-intel-nightly repository!]
The older kernel (with working external display) is the 3.15.0-rc3+ from
a couple of weeks ago. The interesting differences between the two
debugging outputs are as follows (see a complete output of the new
kernel below):
New kernel:
[ 8.683318] [drm:intel_gmbus_force_bit] disabling bit-banging on i915
gmbus dpb. force bit now 1
[ 8.683967] [drm:intel_gmbus_force_bit] enabling bit-banging on i915
gmbus ssc. force bit now 2
[ 8.686725] [drm:intel_gmbus_force_bit] disabling bit-banging on i915
gmbus ssc. force bit now 1
[ 8.687198] [drm:intel_modeset_readout_hw_state] [ENCODER:10:None-10]
hw state readout: enabled, pipe A
[ 8.688108] [drm:intel_modeset_readout_hw_state]
[CONNECTOR:11:LVDS-1] hw state readout: enabled
[ 8.688130] [drm:intel_dump_pipe_config] [CRTC:6][setup_hw_state]
config for pipe A
[ 8.688166] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0,
gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
[ 8.688183] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0,
link_m: 0, link_n: 0, tu: 0
[ 8.688225] [drm:intel_dump_pipe_config] adjusted mode:
[ 8.688238] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0
0 0 0 0 0 0 0x0 0x5
[ 8.688255] [drm:intel_dump_crtc_timings] crtc timings: 65000 1024
1048 1184 1344 768 771 777 806, type: 0x0 flags: 0x5
[ 8.688270] [drm:intel_dump_pipe_config] port clock: 65000
[ 8.688280] [drm:intel_dump_pipe_config] pipe src size: 1024x768
[ 8.688292] [drm:intel_dump_pipe_config] gmch pfit: control:
0x00000000, ratios: 0x00000000, lvds border: 0x00000000
[ 8.688308] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000,
size: 0x00000000, disabled
[ 8.688322] [drm:intel_dump_pipe_config] ips: 0
[ 8.688345] [drm:i9xx_set_fifo_underrun_reporting] *ERROR* pipe B
underrun
Old kernel:
[ 9.461025] [drm:intel_gmbus_force_bit] enabling bit-banging on i915
gmbus dpb. force bit now 2
[ 9.461321] [drm:intel_gmbus_force_bit] disabling bit-banging on i915
gmbus dpb. force bit now 1
[ 9.461336] [drm:intel_gmbus_force_bit] enabling bit-banging on i915
gmbus dpb. force bit now 2
[ 9.461605] [drm:intel_gmbus_force_bit] disabling bit-banging on i915
gmbus dpb. force bit now 1
[ 9.461620] [drm:intel_gmbus_force_bit] enabling bit-banging on i915
gmbus dpb. force bit now 2
[ 9.461887] [drm:intel_gmbus_force_bit] disabling bit-banging on i915
gmbus dpb. force bit now 1
[ 9.461902] [drm:intel_gmbus_force_bit] enabling bit-banging on i915
gmbus ssc. force bit now 2
[ 9.466320] [drm:intel_gmbus_force_bit] disabling bit-banging on i915
gmbus ssc. force bit now 1
[ 9.467045] [drm:intel_modeset_readout_hw_state] [CRTC:5] hw state
readout: enabled
[ 9.467074] [drm:intel_modeset_readout_hw_state] [CRTC:7] hw state
readout: enabled
[ 9.467094] [drm:intel_modeset_readout_hw_state] [ENCODER:9:DAC-9] hw
state readout: enabled, pipe A
[ 9.467111] [drm:intel_modeset_readout_hw_state] [ENCODER:10:None-10]
hw state readout: enabled, pipe A
[ 9.467980] [drm:intel_modeset_readout_hw_state]
[CONNECTOR:11:LVDS-1] hw state readout: enabled
[ 9.467996] [drm:intel_modeset_readout_hw_state] [CONNECTOR:8:VGA-1]
hw state readout: enabled
[ 9.468056] [drm:intel_dump_pipe_config] [CRTC:5][setup_hw_state]
config for pipe A
[ 9.468069] [drm:intel_dump_pipe_config] cpu_transcoder: A
Note that the old kernel found VGA-1 on connector 8, whereas the new
kernel does not even attempt to locate it there. If you check further in
the full output, you'll see that it tries something with connector-11,
but does not find anything there. VGA-1 on the R31 is on connector-8 as
it seems.
Greetings,
Thomas
The full kernel debug output is then as follows:
[ 8.679345] fb: switching to inteldrmfb from VESA VGA
[ 8.682278] [drm:intel_opregion_setup] graphic opregion physical
addr: 0x0
[ 8.682312] [drm:intel_opregion_setup] ACPI OpRegion not supported!
[ 8.682350] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[ 8.682361] [drm] Driver supports precise vblank timestamp query.
[ 8.682375] [drm:init_vbt_defaults] Set default to SSC at 66667 kHz
[ 8.682457] [drm:validate_vbt] Using VBT from PCI ROM: $VBT ALMADOR
d
[ 8.682472] [drm:parse_general_features] BDB_GENERAL_FEATURES
int_tv_support 1 int_crt_support 0 lvds_use_ssc 0 lvds_ssc_freq 48000
display_clock_mode 0 fdi_rx_polarity_inverted 0
[ 8.682507] [drm:parse_sdvo_device_mapping] different child size is
found. Invalid.
[ 8.682521] [drm:parse_device_mapping] different child size is found.
Invalid.
[ 8.682568] [drm:intel_dsm_pci_probe] no _DSM method for intel device
[ 8.682674] [drm:intel_modeset_init] pipe A sprite A init failed: -19
[ 8.682697] [drm:intel_modeset_init] pipe B sprite B init failed: -19
[ 8.683318] [drm:intel_gmbus_force_bit] disabling bit-banging on i915
gmbus dpb. force bit now 1
[ 8.683967] [drm:intel_gmbus_force_bit] enabling bit-banging on i915
gmbus ssc. force bit now 2
[ 8.686725] [drm:intel_gmbus_force_bit] disabling bit-banging on i915
gmbus ssc. force bit now 1
[ 8.687198] [drm:intel_modeset_readout_hw_state] [ENCODER:10:None-10]
hw state readout: enabled, pipe A
[ 8.688108] [drm:intel_modeset_readout_hw_state]
[CONNECTOR:11:LVDS-1] hw state readout: enabled
[ 8.688130] [drm:intel_dump_pipe_config] [CRTC:6][setup_hw_state]
config for pipe A
[ 8.688166] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0,
gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
[ 8.688183] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0,
link_m: 0, link_n: 0, tu: 0
[ 8.688225] [drm:intel_dump_pipe_config] adjusted mode:
[ 8.688238] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0
0 0 0 0 0 0 0x0 0x5
[ 8.688255] [drm:intel_dump_crtc_timings] crtc timings: 65000 1024
1048 1184 1344 768 771 777 806, type: 0x0 flags: 0x5
[ 8.688270] [drm:intel_dump_pipe_config] port clock: 65000
[ 8.688280] [drm:intel_dump_pipe_config] pipe src size: 1024x768
[ 8.688292] [drm:intel_dump_pipe_config] gmch pfit: control:
0x00000000, ratios: 0x00000000, lvds border: 0x00000000
[ 8.688308] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000,
size: 0x00000000, disabled
[ 8.688322] [drm:intel_dump_pipe_config] ips: 0
[ 8.688345] [drm:i9xx_set_fifo_underrun_reporting] *ERROR* pipe B
underrun
[ 8.701026] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) A: 47
[ 8.701043] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) B: 48
[ 8.701054] [drm:i9xx_update_wm] FIFO watermarks - A: 45, B: 46
[ 8.701066] [drm:i9xx_update_wm] Setting FIFO watermarks - A: 45, B:
46, C: 2, SR 1
[ 8.701084] [drm:intel_sanitize_crtc] [CRTC:9] hw state adjusted, was
enabled, now disabled
[ 8.701099] [drm:intel_dump_pipe_config] [CRTC:9][setup_hw_state]
config for pipe B
[ 8.701112] [drm:intel_dump_pipe_config] cpu_transcoder: B
[ 8.701123] [drm:intel_dump_pipe_config] pipe bpp: 0, dithering: 0
[ 8.701135] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0,
gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
[ 8.701151] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0,
link_m: 0, link_n: 0, tu: 0
[ 8.701165] [drm:intel_dump_pipe_config] requested mode:
[ 8.701178] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 640
0 0 0 480 0 0 0 0x0 0x0
[ 8.701192] [drm:intel_dump_pipe_config] adjusted mode:
[ 8.701205] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0
0 0 0 0 0 0 0x0 0x0
[ 8.701221] [drm:intel_dump_crtc_timings] crtc timings: 0 640 656 752
800 480 490 492 525, type: 0x0 flags: 0x0
[ 8.701236] [drm:intel_dump_pipe_config] port clock: 25154
[ 8.701247] [drm:intel_dump_pipe_config] pipe src size: 640x480
[ 8.701258] [drm:intel_dump_pipe_config] gmch pfit: control:
0x00000000, ratios: 0x00000000, lvds border: 0x00000000
[ 8.701274] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000,
size: 0x00000000, disabled
[ 8.701288] [drm:intel_dump_pipe_config] ips: 0
[ 8.701297] [drm:intel_dump_pipe_config] double wide: 0
[ 8.702198] [drm:intel_connector_check_state] [CONNECTOR:11:LVDS-1]
[ 8.702211] [drm:check_encoder_state] [ENCODER:10:None-10]
[ 8.702224] [drm:check_crtc_state] [CRTC:6]
[ 8.702535] [drm:check_crtc_state] [CRTC:9]
[ 8.702561] [drm:i9xx_get_plane_config] pipe/plane 0/0 with fb:
size=1024x768@32, offset=0, pitch 4096, size 0x300000
[ 8.702582] [drm:i915_gem_setup_global_gtt] clearing unused GTT
space: [0, 7fff000]
[ 8.704358] [drm:i915_gem_context_init] fake context support initialized
[ 8.706541] [drm] initialized overlay support
[ 8.706597] [drm:drm_helper_probe_single_connector_modes_merge_bits]
[CONNECTOR:11:LVDS-1]
[ 8.706613] [drm:intel_dvo_detect] [CONNECTOR:11:LVDS-1]
[ 8.706891] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent
adapter i915 gmbus dpc
[ 8.706919] [drm:drm_helper_probe_single_connector_modes_merge_bits]
[CONNECTOR:11:LVDS-1] probed modes :
[ 8.706940] [drm:drm_mode_debug_printmodeline] Modeline 12:"1024x768"
60 65000 1024 1048 1184 1344 768 771 777 806 0x8 0x5
[ 8.706967] [drm:drm_enable_connectors] connector 11 enabled? yes
[ 8.706980] [drm:intel_fb_initial_config] looking for cmdline mode on
connector LVDS-1
[ 8.706995] [drm:intel_fb_initial_config] looking for preferred mode
on connector LVDS-1
[ 8.707012] [drm:intel_fb_initial_config] connector LVDS-1 on pipe A
[CRTC:6]: 1024x768
[ 8.707027] [drm:drm_setup_crtcs] desired mode 1024x768 set on crtc 6
[ 8.707041] [drm:intelfb_create] no BIOS fb, allocating a new one
[ 8.718033] [drm:intelfb_create] allocated 1024x768 fb: 0x00060000,
bo f54b1aa0
[ 8.718500] fbcon: inteldrmfb (fb0) is primary device
[ 8.720562] [drm:intel_crtc_set_config] [CRTC:6] [FB:14]
#connectors=1 (x y) (0 0)
[ 8.720568] [drm:intel_set_config_compute_mode_changes] crtc has no
fb, will flip
[ 8.720571] [drm:intel_set_config_compute_mode_changes] modes are
different, full mode set
[ 8.720578] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0
0 0 0 0 0 0 0x0 0x0
[ 8.720584] [drm:drm_mode_debug_printmodeline] Modeline 13:"1024x768"
60 65000 1024 1048 1184 1344 768 771 777 806 0x8 0x5
[ 8.720586] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=1, fb_changed=1
[ 8.720591] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 8.720599] [drm:intel_modeset_affected_pipes] set mode pipe masks:
modeset: 1, prepare: 1, disable: 0
[ 8.720606] [drm:connected_sink_compute_bpp] [CONNECTOR:11:LVDS-1]
checking for sink bpp constrains
[ 8.720615] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp:
24, dithering: 0
[ 8.720620] [drm:intel_dump_pipe_config] [CRTC:6][modeset] config for
pipe A
[ 8.720621] [drm:intel_dump_pipe_config] cpu_transcoder: A
[ 8.720623] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
[ 8.720627] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0,
gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
[ 8.720630] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0,
link_m: 0, link_n: 0, tu: 0
[ 8.720631] [drm:intel_dump_pipe_config] requested mode:
[ 8.720637] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768"
60 65000 1024 1048 1184 1344 768 771 777 806 0x8 0x5
[ 8.720639] [drm:intel_dump_pipe_config] adjusted mode:
[ 8.720644] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768"
60 65000 1024 1048 1184 1344 768 771 777 806 0x8 0x5
[ 8.720649] [drm:intel_dump_crtc_timings] crtc timings: 65000 1024
1048 1184 1344 768 771 777 806, type: 0x8 flags: 0x5
[ 8.720651] [drm:intel_dump_pipe_config] port clock: 65000
[ 8.720653] [drm:intel_dump_pipe_config] pipe src size: 1024x768
[ 8.720656] [drm:intel_dump_pipe_config] gmch pfit: control:
0x00000000, ratios: 0x00000000, lvds border: 0x00000000
[ 8.720658] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000,
size: 0x00000000, disabled
[ 8.720660] [drm:intel_dump_pipe_config] ips: 0
[ 8.720661] [drm:intel_dump_pipe_config] double wide: 0
[ 8.785048] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) A: 47
[ 8.785053] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) B: 48
[ 8.785056] [drm:i9xx_update_wm] FIFO watermarks - A: 45, B: 46
[ 8.785059] [drm:i9xx_update_wm] Setting FIFO watermarks - A: 45, B:
46, C: 2, SR 1
[ 8.790451] [drm:i9xx_update_primary_plane] Writing base 00060000
00000000 0 0 4096
[ 8.791112] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) A: 47
[ 8.791115] [drm:intel_calculate_wm] FIFO entries required for mode: 41
[ 8.791117] [drm:intel_calculate_wm] FIFO watermark level: 4
[ 8.791120] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) B: 48
[ 8.791122] [drm:i9xx_update_wm] FIFO watermarks - A: 8, B: 46
[ 8.791125] [drm:i9xx_update_wm] Setting FIFO watermarks - A: 8, B:
46, C: 2, SR 1
[ 8.793686] [drm:ivch_dump_regs] VR00: 0xa202
[ 8.794532] [drm:ivch_dump_regs] VR01: 0x0000
[ 8.796815] [drm:ivch_dump_regs] VR40: 0x3400
[ 8.797748] [drm:ivch_dump_regs] VR80: 0x0000
[ 8.798873] [drm:ivch_dump_regs] VR81: 0x0000
[ 8.799743] [drm:ivch_dump_regs] VR82: 0x000a
[ 8.801469] [drm:ivch_dump_regs] VR84: 0x000a
[ 8.802322] [drm:ivch_dump_regs] VR85: 0x000a
[ 8.803187] [drm:ivch_dump_regs] VR86: 0x000a
[ 8.804141] [drm:ivch_dump_regs] VR87: 0x000a
[ 8.804995] [drm:ivch_dump_regs] VR88: 0x000a
[ 8.806686] [drm:ivch_dump_regs] VR8F: 0x0003
[ 8.828741] [drm:intel_connector_check_state] [CONNECTOR:11:LVDS-1]
[ 8.828745] [drm:check_encoder_state] [ENCODER:10:None-10]
[ 8.828749] [drm:check_crtc_state] [CRTC:6]
[ 8.828783] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:9], mode_changed=0, fb_changed=0
[ 8.828787] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 8.828809] Console: switching to colour frame buffer device 128x48
[ 8.828842] [drm:intel_crtc_set_config] [CRTC:6] [FB:14]
#connectors=1 (x y) (0 0)
[ 8.828847] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=0
[ 8.828850] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 9.087677] i915 0000:00:02.0: fb0: inteldrmfb frame buffer device
[ 9.091020] i915 0000:00:02.0: registered panic notifier
[ 9.095220] [drm] Initialized i915 1.6.0 20140606 for 0000:00:02.0 on
minor 0
[ 27.717587] [drm:intel_crtc_set_config] [CRTC:6] [FB:14]
#connectors=1 (x y) (0 0)
[ 27.717598] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=0
[ 27.717604] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 34.063398] [drm:i915_gem_open]
[ 34.063606] [drm:intel_crtc_set_config] [CRTC:6] [FB:14]
#connectors=1 (x y) (0 0)
[ 34.063677] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=0
[ 34.063689] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 34.063701] [drm:intel_crtc_set_config] [CRTC:9] [NOFB]
[ 34.063712] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:9], mode_changed=0, fb_changed=0
[ 34.063722] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 34.063825] [drm:i915_gem_open]
[ 34.066452] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[1] ENCODERS[1]
[ 34.066495] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[1] ENCODERS[1]
[ 34.066648] [drm:drm_mode_getconnector] [CONNECTOR:11:?]
[ 34.066661] [drm:drm_helper_probe_single_connector_modes_merge_bits]
[CONNECTOR:11:LVDS-1]
[ 34.066672] [drm:intel_dvo_detect] [CONNECTOR:11:LVDS-1]
[ 34.066980] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent
adapter i915 gmbus dpc
[ 34.067004] [drm:drm_helper_probe_single_connector_modes_merge_bits]
[CONNECTOR:11:LVDS-1] probed modes :
[ 34.067018] [drm:drm_mode_debug_printmodeline] Modeline 12:"1024x768"
60 65000 1024 1048 1184 1344 768 771 777 806 0x8 0x5
[ 34.067031] [drm:drm_mode_getconnector] [CONNECTOR:11:?]
[ 34.067521] [drm:drm_mode_getconnector] [CONNECTOR:11:?]
[ 34.067546] [drm:drm_helper_probe_single_connector_modes_merge_bits]
[CONNECTOR:11:LVDS-1]
[ 34.067556] [drm:intel_dvo_detect] [CONNECTOR:11:LVDS-1]
[ 34.067851] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent
adapter i915 gmbus dpc
[ 34.067869] [drm:drm_helper_probe_single_connector_modes_merge_bits]
[CONNECTOR:11:LVDS-1] probed modes :
[ 34.067882] [drm:drm_mode_debug_printmodeline] Modeline 12:"1024x768"
60 65000 1024 1048 1184 1344 768 771 777 806 0x8 0x5
[ 34.067896] [drm:drm_mode_getconnector] [CONNECTOR:11:?]
[ 34.182282] [drm:drm_mode_addfb] [FB:15]
[ 34.182493] [drm:drm_mode_setcrtc] [CRTC:6]
[ 34.182557] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 34.182571] [drm:intel_crtc_set_config] [CRTC:6] [FB:15]
#connectors=1 (x y) (0 0)
[ 34.182586] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 34.182597] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 34.193037] [drm:i9xx_update_primary_plane] Writing base 00400000
00000000 0 0 4096
[ 40.366965] [drm:add_framebuffer_internal] [FB:16]
[ 40.369418] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) A: 47
[ 40.369455] [drm:intel_calculate_wm] FIFO entries required for mode: 41
[ 40.369465] [drm:intel_calculate_wm] FIFO watermark level: 4
[ 40.369475] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) B: 48
[ 40.369485] [drm:i9xx_update_wm] FIFO watermarks - A: 8, B: 46
[ 40.369495] [drm:i9xx_update_wm] Setting FIFO watermarks - A: 8, B:
46, C: 2, SR 1
[ 42.652894] [drm:intel_dvo_detect] [CONNECTOR:11:LVDS-1]
[ 51.448928] [drm:drm_mode_getconnector] [CONNECTOR:11:?]
[ 51.448968] [drm:drm_helper_probe_single_connector_modes_merge_bits]
[CONNECTOR:11:LVDS-1]
[ 51.448979] [drm:intel_dvo_detect] [CONNECTOR:11:LVDS-1]
[ 51.449285] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent
adapter i915 gmbus dpc
[ 51.449312] [drm:drm_helper_probe_single_connector_modes_merge_bits]
[CONNECTOR:11:LVDS-1] probed modes :
[ 51.449327] [drm:drm_mode_debug_printmodeline] Modeline 12:"1024x768"
60 65000 1024 1048 1184 1344 768 771 777 806 0x8 0x5
[ 51.449345] [drm:drm_mode_getconnector] [CONNECTOR:11:?]
[ 51.450143] [drm:drm_mode_getconnector] [CONNECTOR:11:?]
[ 51.450167] [drm:drm_helper_probe_single_connector_modes_merge_bits]
[CONNECTOR:11:LVDS-1]
[ 51.450177] [drm:intel_dvo_detect] [CONNECTOR:11:LVDS-1]
[ 51.450473] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent
adapter i915 gmbus dpc
[ 51.450495] [drm:drm_helper_probe_single_connector_modes_merge_bits]
[CONNECTOR:11:LVDS-1] probed modes :
[ 51.450508] [drm:drm_mode_debug_printmodeline] Modeline 12:"1024x768"
60 65000 1024 1048 1184 1344 768 771 777 806 0x8 0x5
[ 51.450524] [drm:drm_mode_getconnector] [CONNECTOR:11:?]
[ 52.617620] [drm:drm_mode_getconnector] [CONNECTOR:11:?]
[ 52.617662] [drm:drm_helper_probe_single_connector_modes_merge_bits]
[CONNECTOR:11:LVDS-1]
[ 52.617673] [drm:intel_dvo_detect] [CONNECTOR:11:LVDS-1]
[ 52.617995] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent
adapter i915 gmbus dpc
[ 52.618022] [drm:drm_helper_probe_single_connector_modes_merge_bits]
[CONNECTOR:11:LVDS-1] probed modes :
[ 52.618037] [drm:drm_mode_debug_printmodeline] Modeline 12:"1024x768"
60 65000 1024 1048 1184 1344 768 771 777 806 0x8 0x5
[ 52.618054] [drm:drm_mode_getconnector] [CONNECTOR:11:?]
[ 53.668426] [drm:drm_mode_getconnector] [CONNECTOR:11:?]
[ 53.668467] [drm:drm_helper_probe_single_connector_modes_merge_bits]
[CONNECTOR:11:LVDS-1]
[ 53.668479] [drm:intel_dvo_detect] [CONNECTOR:11:LVDS-1]
[ 53.668783] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent
adapter i915 gmbus dpc
[ 53.668809] [drm:drm_helper_probe_single_connector_modes_merge_bits]
[CONNECTOR:11:LVDS-1] probed modes :
[ 53.668824] [drm:drm_mode_debug_printmodeline] Modeline 12:"1024x768"
60 65000 1024 1048 1184 1344 768 771 777 806 0x8 0x5
[ 53.668842] [drm:drm_mode_getconnector] [CONNECTOR:11:?]
[ 53.670707] [drm:intel_crtc_cursor_set_obj] cursor off
[ 53.670744] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) A: 47
[ 53.670755] [drm:intel_calculate_wm] FIFO entries required for mode: 41
[ 53.670763] [drm:intel_calculate_wm] FIFO watermark level: 4
[ 53.670774] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) B: 48
[ 53.670784] [drm:i9xx_update_wm] FIFO watermarks - A: 8, B: 46
[ 53.670795] [drm:i9xx_update_wm] Setting FIFO watermarks - A: 8, B:
46, C: 2, SR 1
[ 53.671150] [drm:drm_mode_addfb] [FB:17]
[ 53.671262] [drm:drm_mode_setcrtc] [CRTC:6]
[ 53.671281] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 53.671295] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 0)
[ 53.671309] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 53.671320] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 53.716744] [drm:i9xx_update_primary_plane] Writing base 02000000
00000000 0 0 8192
[ 53.735349] [drm:add_framebuffer_internal] [FB:15]
[ 53.735418] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) A: 47
[ 53.735430] [drm:intel_calculate_wm] FIFO entries required for mode: 41
[ 53.735440] [drm:intel_calculate_wm] FIFO watermark level: 4
[ 53.735451] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) B: 48
[ 53.735463] [drm:i9xx_update_wm] FIFO watermarks - A: 8, B: 46
[ 53.735474] [drm:i9xx_update_wm] Setting FIFO watermarks - A: 8, B:
46, C: 2, SR 1
[ 53.738882] [drm:drm_mode_getconnector] [CONNECTOR:11:?]
[ 53.738933] [drm:drm_helper_probe_single_connector_modes_merge_bits]
[CONNECTOR:11:LVDS-1]
[ 53.738945] [drm:intel_dvo_detect] [CONNECTOR:11:LVDS-1]
[ 53.739280] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent
adapter i915 gmbus dpc
[ 53.739311] [drm:drm_helper_probe_single_connector_modes_merge_bits]
[CONNECTOR:11:LVDS-1] probed modes :
[ 53.739327] [drm:drm_mode_debug_printmodeline] Modeline 12:"1024x768"
60 65000 1024 1048 1184 1344 768 771 777 806 0x8 0x5
[ 53.739351] [drm:drm_mode_getconnector] [CONNECTOR:11:?]
[ 53.740559] [drm:drm_mode_getconnector] [CONNECTOR:11:?]
[ 53.740597] [drm:drm_helper_probe_single_connector_modes_merge_bits]
[CONNECTOR:11:LVDS-1]
[ 53.740607] [drm:intel_dvo_detect] [CONNECTOR:11:LVDS-1]
[ 53.740913] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent
adapter i915 gmbus dpc
[ 53.740938] [drm:drm_helper_probe_single_connector_modes_merge_bits]
[CONNECTOR:11:LVDS-1] probed modes :
[ 53.740951] [drm:drm_mode_debug_printmodeline] Modeline 12:"1024x768"
60 65000 1024 1048 1184 1344 768 771 777 806 0x8 0x5
[ 53.740971] [drm:drm_mode_getconnector] [CONNECTOR:11:?]
[ 56.378962] [drm:drm_mode_getconnector] [CONNECTOR:11:?]
[ 56.379001] [drm:drm_helper_probe_single_connector_modes_merge_bits]
[CONNECTOR:11:LVDS-1]
[ 56.379011] [drm:intel_dvo_detect] [CONNECTOR:11:LVDS-1]
[ 56.379321] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent
adapter i915 gmbus dpc
[ 56.379347] [drm:drm_helper_probe_single_connector_modes_merge_bits]
[CONNECTOR:11:LVDS-1] probed modes :
[ 56.379362] [drm:drm_mode_debug_printmodeline] Modeline 12:"1024x768"
60 65000 1024 1048 1184 1344 768 771 777 806 0x8 0x5
[ 56.379378] [drm:drm_mode_getconnector] [CONNECTOR:11:?]
[ 69.507766] [drm:intel_crtc_cursor_set_obj] cursor off
[ 69.507819] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) A: 47
[ 69.507831] [drm:intel_calculate_wm] FIFO entries required for mode: 41
[ 69.507840] [drm:intel_calculate_wm] FIFO watermark level: 4
[ 69.507850] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) B: 48
[ 69.507861] [drm:i9xx_update_wm] FIFO watermarks - A: 8, B: 46
[ 69.507872] [drm:i9xx_update_wm] Setting FIFO watermarks - A: 8, B:
46, C: 2, SR 1
[ 69.508531] [drm:drm_mode_setcrtc] [CRTC:6]
[ 69.508570] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 69.508583] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 10)
[ 69.508597] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 69.508608] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 69.508641] [drm:i9xx_update_primary_plane] Writing base 02000000
00014000 0 10 8192
[ 69.516089] [drm:drm_mode_setcrtc] [CRTC:6]
[ 69.516144] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 69.516159] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 45)
[ 69.516175] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 69.516186] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 69.516221] [drm:i9xx_update_primary_plane] Writing base 02000000
0005A000 0 45 8192
[ 69.523998] [drm:drm_mode_setcrtc] [CRTC:6]
[ 69.524126] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 69.524142] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 84)
[ 69.524158] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 69.524169] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 69.524206] [drm:i9xx_update_primary_plane] Writing base 02000000
000A8000 0 84 8192
[ 69.532014] [drm:drm_mode_setcrtc] [CRTC:6]
[ 69.532149] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 69.532164] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 125)
[ 69.532181] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 69.532192] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 69.532228] [drm:i9xx_update_primary_plane] Writing base 02000000
000FA000 0 125 8192
[ 69.540015] [drm:drm_mode_setcrtc] [CRTC:6]
[ 69.540147] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 69.540162] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 170)
[ 69.540179] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 69.540189] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 69.540225] [drm:i9xx_update_primary_plane] Writing base 02000000
00154000 0 170 8192
[ 69.548091] [drm:drm_mode_setcrtc] [CRTC:6]
[ 69.548147] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 69.548162] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 213)
[ 69.548179] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 69.548189] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 69.548225] [drm:i9xx_update_primary_plane] Writing base 02000000
001AA000 0 213 8192
[ 69.555979] [drm:drm_mode_setcrtc] [CRTC:6]
[ 69.556109] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 69.556124] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 258)
[ 69.556140] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 69.556151] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 69.556186] [drm:i9xx_update_primary_plane] Writing base 02000000
00204000 0 258 8192
[ 69.564008] [drm:drm_mode_setcrtc] [CRTC:6]
[ 69.564138] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 69.564152] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 303)
[ 69.564167] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 69.564179] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 69.564213] [drm:i9xx_update_primary_plane] Writing base 02000000
0025E000 0 303 8192
[ 69.572005] [drm:drm_mode_setcrtc] [CRTC:6]
[ 69.572133] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 69.572148] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 350)
[ 69.572165] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 69.572176] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 69.572211] [drm:i9xx_update_primary_plane] Writing base 02000000
002BC000 0 350 8192
[ 69.580002] [drm:drm_mode_setcrtc] [CRTC:6]
[ 69.580134] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 69.580148] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 397)
[ 69.580165] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 69.580176] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 69.580211] [drm:i9xx_update_primary_plane] Writing base 02000000
0031A000 0 397 8192
[ 69.587997] [drm:drm_mode_setcrtc] [CRTC:6]
[ 69.588128] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 69.588143] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 444)
[ 69.588159] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 69.588170] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 69.588205] [drm:i9xx_update_primary_plane] Writing base 02000000
00378000 0 444 8192
[ 69.595991] [drm:drm_mode_setcrtc] [CRTC:6]
[ 69.596119] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 69.596135] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 491)
[ 69.596150] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 69.596162] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 69.596196] [drm:i9xx_update_primary_plane] Writing base 02000000
003D6000 0 491 8192
[ 69.603999] [drm:drm_mode_setcrtc] [CRTC:6]
[ 69.604131] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 69.604146] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 538)
[ 69.604162] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 69.604173] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 69.604208] [drm:i9xx_update_primary_plane] Writing base 02000000
00434000 0 538 8192
[ 69.612330] [drm:drm_mode_setcrtc] [CRTC:6]
[ 69.612386] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 69.612400] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 585)
[ 69.612416] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 69.612428] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 69.612463] [drm:i9xx_update_primary_plane] Writing base 02000000
00492000 0 585 8192
[ 69.619978] [drm:drm_mode_setcrtc] [CRTC:6]
[ 69.620111] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 69.620125] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 632)
[ 69.620141] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 69.620152] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 69.620186] [drm:i9xx_update_primary_plane] Writing base 02000000
004F0000 0 632 8192
[ 69.627882] [drm:drm_mode_setcrtc] [CRTC:6]
[ 69.627929] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 69.627943] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 679)
[ 69.627960] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 69.627971] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 69.628006] [drm:i9xx_update_primary_plane] Writing base 02000000
0054E000 0 679 8192
[ 69.635995] [drm:drm_mode_setcrtc] [CRTC:6]
[ 69.636126] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 69.636141] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 726)
[ 69.636156] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 69.636167] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 69.636202] [drm:i9xx_update_primary_plane] Writing base 02000000
005AC000 0 726 8192
[ 69.644266] [drm:drm_mode_setcrtc] [CRTC:6]
[ 69.644316] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 69.644330] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 768)
[ 69.644345] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 69.644356] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 69.644387] [drm:i9xx_update_primary_plane] Writing base 02000000
00600000 0 768 8192
[ 69.651759] [drm:add_framebuffer_internal] [FB:18]
[ 69.651822] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) A: 47
[ 69.651835] [drm:intel_calculate_wm] FIFO entries required for mode: 41
[ 69.651844] [drm:intel_calculate_wm] FIFO watermark level: 4
[ 69.651854] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) B: 48
[ 69.651865] [drm:i9xx_update_wm] FIFO watermarks - A: 8, B: 46
[ 69.651874] [drm:i9xx_update_wm] Setting FIFO watermarks - A: 8, B:
46, C: 2, SR 1
[ 70.196253] [drm:drm_mode_setcrtc] [CRTC:6]
[ 70.196314] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 70.196329] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 746)
[ 70.196344] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 70.196356] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 70.196392] [drm:i9xx_update_primary_plane] Writing base 02000000
005D4000 0 746 8192
[ 70.203944] [drm:drm_mode_setcrtc] [CRTC:6]
[ 70.204004] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 70.204098] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 707)
[ 70.204115] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 70.204128] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 70.204164] [drm:i9xx_update_primary_plane] Writing base 02000000
00586000 0 707 8192
[ 70.212123] [drm:drm_mode_setcrtc] [CRTC:6]
[ 70.212183] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 70.212199] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 668)
[ 70.212216] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 70.212230] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 70.212265] [drm:i9xx_update_primary_plane] Writing base 02000000
00538000 0 668 8192
[ 70.219971] [drm:drm_mode_setcrtc] [CRTC:6]
[ 70.220094] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 70.220110] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 631)
[ 70.220125] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 70.220137] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 70.220173] [drm:i9xx_update_primary_plane] Writing base 02000000
004EE000 0 631 8192
[ 70.227787] [drm:drm_mode_setcrtc] [CRTC:6]
[ 70.227848] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 70.227863] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 594)
[ 70.227879] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 70.227890] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 70.227926] [drm:i9xx_update_primary_plane] Writing base 02000000
004A4000 0 594 8192
[ 70.236132] [drm:drm_mode_setcrtc] [CRTC:6]
[ 70.236192] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 70.236206] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 557)
[ 70.236222] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 70.236234] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 70.236272] [drm:i9xx_update_primary_plane] Writing base 02000000
0045A000 0 557 8192
[ 70.243893] [drm:drm_mode_setcrtc] [CRTC:6]
[ 70.243942] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 70.243956] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 514)
[ 70.243970] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 70.243981] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 70.244079] [drm:i9xx_update_primary_plane] Writing base 02000000
00404000 0 514 8192
[ 70.252113] [drm:drm_mode_setcrtc] [CRTC:6]
[ 70.252173] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 70.252188] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 473)
[ 70.252203] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 70.252215] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 70.252252] [drm:i9xx_update_primary_plane] Writing base 02000000
003B2000 0 473 8192
[ 70.259950] [drm:drm_mode_setcrtc] [CRTC:6]
[ 70.260093] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 70.260109] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 432)
[ 70.260123] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 70.260135] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 70.260171] [drm:i9xx_update_primary_plane] Writing base 02000000
00360000 0 432 8192
[ 70.268113] [drm:drm_mode_setcrtc] [CRTC:6]
[ 70.268174] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 70.268188] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 391)
[ 70.268204] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 70.268217] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 70.268253] [drm:i9xx_update_primary_plane] Writing base 02000000
0030E000 0 391 8192
[ 70.275921] [drm:drm_mode_setcrtc] [CRTC:6]
[ 70.275981] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 70.275995] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 350)
[ 70.276092] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 70.276105] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 70.276140] [drm:i9xx_update_primary_plane] Writing base 02000000
002BC000 0 350 8192
[ 70.284109] [drm:drm_mode_setcrtc] [CRTC:6]
[ 70.284168] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 70.284183] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 309)
[ 70.284200] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 70.284213] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 70.284248] [drm:i9xx_update_primary_plane] Writing base 02000000
0026A000 0 309 8192
[ 70.291926] [drm:drm_mode_setcrtc] [CRTC:6]
[ 70.291987] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 70.292001] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 268)
[ 70.292099] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 70.292112] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 70.292147] [drm:i9xx_update_primary_plane] Writing base 02000000
00218000 0 268 8192
[ 70.300112] [drm:drm_mode_setcrtc] [CRTC:6]
[ 70.300173] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 70.300188] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 233)
[ 70.300204] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 70.300217] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 70.300255] [drm:i9xx_update_primary_plane] Writing base 02000000
001D2000 0 233 8192
[ 70.307928] [drm:drm_mode_setcrtc] [CRTC:6]
[ 70.307988] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 70.308003] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 198)
[ 70.308102] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 70.308115] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 70.308149] [drm:i9xx_update_primary_plane] Writing base 02000000
0018C000 0 198 8192
[ 70.316012] [drm:drm_mode_setcrtc] [CRTC:6]
[ 70.316162] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 70.316178] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 163)
[ 70.316194] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 70.316206] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 70.316244] [drm:i9xx_update_primary_plane] Writing base 02000000
00146000 0 163 8192
[ 70.323873] [drm:drm_mode_setcrtc] [CRTC:6]
[ 70.323934] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 70.323949] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 128)
[ 70.323965] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 70.323976] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 70.324091] [drm:i9xx_update_primary_plane] Writing base 02000000
00100000 0 128 8192
[ 70.332133] [drm:drm_mode_setcrtc] [CRTC:6]
[ 70.332194] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 70.332209] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 97)
[ 70.332226] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 70.332240] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 70.332276] [drm:i9xx_update_primary_plane] Writing base 02000000
000C2000 0 97 8192
[ 70.339919] [drm:drm_mode_setcrtc] [CRTC:6]
[ 70.339979] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 70.339995] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 66)
[ 70.340090] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 70.340104] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 70.340140] [drm:i9xx_update_primary_plane] Writing base 02000000
00084000 0 66 8192
[ 70.348104] [drm:drm_mode_setcrtc] [CRTC:6]
[ 70.348165] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 70.348181] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 35)
[ 70.348198] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 70.348210] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 70.348248] [drm:i9xx_update_primary_plane] Writing base 02000000
00046000 0 35 8192
[ 70.355972] [drm:drm_mode_setcrtc] [CRTC:6]
[ 70.356112] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 70.356127] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 8)
[ 70.356143] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 70.356155] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 70.356190] [drm:i9xx_update_primary_plane] Writing base 02000000
00010000 0 8 8192
[ 70.363923] [drm:drm_mode_setcrtc] [CRTC:6]
[ 70.363984] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 70.363999] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 0)
[ 70.364099] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 70.364113] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 70.364150] [drm:i9xx_update_primary_plane] Writing base 02000000
00000000 0 0 8192
[ 74.211293] [drm:drm_mode_getconnector] [CONNECTOR:11:?]
[ 74.211334] [drm:drm_helper_probe_single_connector_modes_merge_bits]
[CONNECTOR:11:LVDS-1]
[ 74.211346] [drm:intel_dvo_detect] [CONNECTOR:11:LVDS-1]
[ 74.211658] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent
adapter i915 gmbus dpc
[ 74.211685] [drm:drm_helper_probe_single_connector_modes_merge_bits]
[CONNECTOR:11:LVDS-1] probed modes :
[ 74.211699] [drm:drm_mode_debug_printmodeline] Modeline 12:"1024x768"
60 65000 1024 1048 1184 1344 768 771 777 806 0x8 0x5
[ 74.211716] [drm:drm_mode_getconnector] [CONNECTOR:11:?]
[ 80.595561] [drm:drm_mode_getconnector] [CONNECTOR:11:?]
[ 80.595601] [drm:drm_helper_probe_single_connector_modes_merge_bits]
[CONNECTOR:11:LVDS-1]
[ 80.595612] [drm:intel_dvo_detect] [CONNECTOR:11:LVDS-1]
[ 80.595935] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent
adapter i915 gmbus dpc
[ 80.595961] [drm:drm_helper_probe_single_connector_modes_merge_bits]
[CONNECTOR:11:LVDS-1] probed modes :
[ 80.595975] [drm:drm_mode_debug_printmodeline] Modeline 12:"1024x768"
60 65000 1024 1048 1184 1344 768 771 777 806 0x8 0x5
[ 80.595993] [drm:drm_mode_getconnector] [CONNECTOR:11:?]
[ 83.141398] [drm:drm_mode_getconnector] [CONNECTOR:11:?]
[ 83.141432] [drm:drm_helper_probe_single_connector_modes_merge_bits]
[CONNECTOR:11:LVDS-1]
[ 83.141442] [drm:intel_dvo_detect] [CONNECTOR:11:LVDS-1]
[ 83.141751] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent
adapter i915 gmbus dpc
[ 83.141799] [drm:drm_helper_probe_single_connector_modes_merge_bits]
[CONNECTOR:11:LVDS-1] probed modes :
[ 83.141814] [drm:drm_mode_debug_printmodeline] Modeline 12:"1024x768"
60 65000 1024 1048 1184 1344 768 771 777 806 0x8 0x5
[ 83.141833] [drm:drm_mode_getconnector] [CONNECTOR:11:?]
[ 84.474793] [drm:drm_mode_getconnector] [CONNECTOR:11:?]
[ 84.474834] [drm:drm_helper_probe_single_connector_modes_merge_bits]
[CONNECTOR:11:LVDS-1]
[ 84.474846] [drm:intel_dvo_detect] [CONNECTOR:11:LVDS-1]
[ 84.475168] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent
adapter i915 gmbus dpc
[ 84.475195] [drm:drm_helper_probe_single_connector_modes_merge_bits]
[CONNECTOR:11:LVDS-1] probed modes :
[ 84.475209] [drm:drm_mode_debug_printmodeline] Modeline 12:"1024x768"
60 65000 1024 1048 1184 1344 768 771 777 806 0x8 0x5
[ 84.475226] [drm:drm_mode_getconnector] [CONNECTOR:11:?]
[ 89.536297] [drm:intel_crtc_cursor_set_obj] cursor off
[ 89.536336] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) A: 47
[ 89.536347] [drm:intel_calculate_wm] FIFO entries required for mode: 41
[ 89.536355] [drm:intel_calculate_wm] FIFO watermark level: 4
[ 89.536365] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) B: 48
[ 89.536374] [drm:i9xx_update_wm] FIFO watermarks - A: 8, B: 46
[ 89.536384] [drm:i9xx_update_wm] Setting FIFO watermarks - A: 8, B:
46, C: 2, SR 1
[ 89.536677] [drm:drm_mode_setcrtc] [CRTC:6]
[ 89.536701] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 89.536713] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (12 0)
[ 89.536727] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 89.536737] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 89.536764] [drm:i9xx_update_primary_plane] Writing base 02000000
00000030 12 0 8192
[ 89.544597] [drm:drm_mode_setcrtc] [CRTC:6]
[ 89.544648] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 89.544662] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (25 0)
[ 89.544676] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 89.544688] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 89.544720] [drm:i9xx_update_primary_plane] Writing base 02000000
00000064 25 0 8192
[ 89.552570] [drm:drm_mode_setcrtc] [CRTC:6]
[ 89.552620] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 89.552633] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (34 0)
[ 89.552648] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 89.552659] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 89.552690] [drm:i9xx_update_primary_plane] Writing base 02000000
00000088 34 0 8192
[ 89.560580] [drm:drm_mode_setcrtc] [CRTC:6]
[ 89.560631] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 89.560644] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (41 0)
[ 89.560658] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 89.560670] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 89.560701] [drm:i9xx_update_primary_plane] Writing base 02000000
000000A4 41 0 8192
[ 89.568323] [drm:add_framebuffer_internal] [FB:19]
[ 89.568369] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) A: 47
[ 89.568381] [drm:intel_calculate_wm] FIFO entries required for mode: 41
[ 89.568389] [drm:intel_calculate_wm] FIFO watermark level: 4
[ 89.568400] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) B: 48
[ 89.568409] [drm:i9xx_update_wm] FIFO watermarks - A: 8, B: 46
[ 89.568419] [drm:i9xx_update_wm] Setting FIFO watermarks - A: 8, B:
46, C: 2, SR 1
[ 89.568720] [drm:drm_mode_setcrtc] [CRTC:6]
[ 89.568742] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 89.568755] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (45 0)
[ 89.568769] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 89.568779] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 89.568809] [drm:i9xx_update_primary_plane] Writing base 02000000
000000B4 45 0 8192
[ 89.569581] [drm:intel_crtc_cursor_set_obj] cursor off
[ 89.569626] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) A: 47
[ 89.569637] [drm:intel_calculate_wm] FIFO entries required for mode: 41
[ 89.569646] [drm:intel_calculate_wm] FIFO watermark level: 4
[ 89.569656] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) B: 48
[ 89.569667] [drm:i9xx_update_wm] FIFO watermarks - A: 8, B: 46
[ 89.569677] [drm:i9xx_update_wm] Setting FIFO watermarks - A: 8, B:
46, C: 2, SR 1
[ 89.576343] [drm:add_framebuffer_internal] [FB:20]
[ 89.576389] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) A: 47
[ 89.576400] [drm:intel_calculate_wm] FIFO entries required for mode: 41
[ 89.576409] [drm:intel_calculate_wm] FIFO watermark level: 4
[ 89.576419] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) B: 48
[ 89.576429] [drm:i9xx_update_wm] FIFO watermarks - A: 8, B: 46
[ 89.576438] [drm:i9xx_update_wm] Setting FIFO watermarks - A: 8, B:
46, C: 2, SR 1
[ 89.578052] [drm:intel_crtc_cursor_set_obj] cursor off
[ 89.578098] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) A: 47
[ 89.578109] [drm:intel_calculate_wm] FIFO entries required for mode: 41
[ 89.578118] [drm:intel_calculate_wm] FIFO watermark level: 4
[ 89.578128] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) B: 48
[ 89.578138] [drm:i9xx_update_wm] FIFO watermarks - A: 8, B: 46
[ 89.578148] [drm:i9xx_update_wm] Setting FIFO watermarks - A: 8, B:
46, C: 2, SR 1
[ 89.578396] [drm:drm_mode_setcrtc] [CRTC:6]
[ 89.578417] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 89.578430] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (49 0)
[ 89.578444] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 89.578454] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 89.578482] [drm:i9xx_update_primary_plane] Writing base 02000000
000000C4 49 0 8192
[ 89.584340] [drm:add_framebuffer_internal] [FB:21]
[ 89.584389] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) A: 47
[ 89.584401] [drm:intel_calculate_wm] FIFO entries required for mode: 41
[ 89.584409] [drm:intel_calculate_wm] FIFO watermark level: 4
[ 89.584419] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) B: 48
[ 89.584429] [drm:i9xx_update_wm] FIFO watermarks - A: 8, B: 46
[ 89.584438] [drm:i9xx_update_wm] Setting FIFO watermarks - A: 8, B:
46, C: 2, SR 1
[ 89.584754] [drm:drm_mode_setcrtc] [CRTC:6]
[ 89.584777] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 89.584790] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (50 0)
[ 89.584803] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 89.584814] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 89.584845] [drm:i9xx_update_primary_plane] Writing base 02000000
000000C8 50 0 8192
[ 89.585635] [drm:intel_crtc_cursor_set_obj] cursor off
[ 89.585681] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) A: 47
[ 89.585692] [drm:intel_calculate_wm] FIFO entries required for mode: 41
[ 89.585701] [drm:intel_calculate_wm] FIFO watermark level: 4
[ 89.585711] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) B: 48
[ 89.585722] [drm:i9xx_update_wm] FIFO watermarks - A: 8, B: 46
[ 89.585732] [drm:i9xx_update_wm] Setting FIFO watermarks - A: 8, B:
46, C: 2, SR 1
[ 89.664287] [drm:add_framebuffer_internal] [FB:22]
[ 89.664334] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) A: 47
[ 89.664345] [drm:intel_calculate_wm] FIFO entries required for mode: 41
[ 89.664353] [drm:intel_calculate_wm] FIFO watermark level: 4
[ 89.664364] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) B: 48
[ 89.664374] [drm:i9xx_update_wm] FIFO watermarks - A: 8, B: 46
[ 89.664383] [drm:i9xx_update_wm] Setting FIFO watermarks - A: 8, B:
46, C: 2, SR 1
[ 107.341273] [drm:intel_crtc_cursor_set_obj] cursor off
[ 107.341315] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) A: 47
[ 107.341326] [drm:intel_calculate_wm] FIFO entries required for mode: 41
[ 107.341335] [drm:intel_calculate_wm] FIFO watermark level: 4
[ 107.341345] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) B: 48
[ 107.341356] [drm:i9xx_update_wm] FIFO watermarks - A: 8, B: 46
[ 107.341366] [drm:i9xx_update_wm] Setting FIFO watermarks - A: 8, B:
46, C: 2, SR 1
[ 107.343071] [drm:drm_mode_setcrtc] [CRTC:6]
[ 107.343121] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 107.343135] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (56 0)
[ 107.343150] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 107.343160] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 107.343190] [drm:i9xx_update_primary_plane] Writing base 02000000
000000E0 56 0 8192
[ 107.351055] [drm:drm_mode_setcrtc] [CRTC:6]
[ 107.351106] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 107.351119] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (73 0)
[ 107.351135] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 107.351146] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 107.351175] [drm:i9xx_update_primary_plane] Writing base 02000000
00000124 73 0 8192
[ 107.357577] [drm:drm_mode_setcrtc] [CRTC:6]
[ 107.357625] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 107.357640] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (90 0)
[ 107.357654] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 107.357665] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 107.357694] [drm:i9xx_update_primary_plane] Writing base 02000000
00000168 90 0 8192
[ 107.365599] [drm:drm_mode_setcrtc] [CRTC:6]
[ 107.365649] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 107.365664] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (109 0)
[ 107.365678] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 107.365690] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 107.365722] [drm:i9xx_update_primary_plane] Writing base 02000000
000001B4 109 0 8192
[ 107.373602] [drm:drm_mode_setcrtc] [CRTC:6]
[ 107.373651] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 107.373667] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (130 0)
[ 107.373682] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 107.373693] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 107.373727] [drm:i9xx_update_primary_plane] Writing base 02000000
00000208 130 0 8192
[ 107.381603] [drm:drm_mode_setcrtc] [CRTC:6]
[ 107.381652] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 107.381667] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (147 0)
[ 107.381682] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 107.381694] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 107.381726] [drm:i9xx_update_primary_plane] Writing base 02000000
0000024C 147 0 8192
[ 107.389603] [drm:drm_mode_setcrtc] [CRTC:6]
[ 107.389652] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 107.389667] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (160 0)
[ 107.389682] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 107.389693] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 107.389726] [drm:i9xx_update_primary_plane] Writing base 02000000
00000280 160 0 8192
[ 107.397581] [drm:drm_mode_setcrtc] [CRTC:6]
[ 107.397630] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 107.397643] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (173 0)
[ 107.397657] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 107.397669] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 107.397698] [drm:i9xx_update_primary_plane] Writing base 02000000
000002B4 173 0 8192
[ 107.405600] [drm:drm_mode_setcrtc] [CRTC:6]
[ 107.405651] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 107.405665] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (182 0)
[ 107.405679] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 107.405691] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 107.405725] [drm:i9xx_update_primary_plane] Writing base 02000000
000002D8 182 0 8192
[ 107.413586] [drm:drm_mode_setcrtc] [CRTC:6]
[ 107.413635] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 107.413649] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (187 0)
[ 107.413663] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 107.413675] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 107.413707] [drm:i9xx_update_primary_plane] Writing base 02000000
000002EC 187 0 8192
[ 107.421609] [drm:drm_mode_setcrtc] [CRTC:6]
[ 107.421656] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 107.421671] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (190 0)
[ 107.421686] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 107.421697] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 107.421730] [drm:i9xx_update_primary_plane] Writing base 02000000
000002F8 190 0 8192
[ 107.437371] [drm:add_framebuffer_internal] [FB:23]
[ 107.437418] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) A: 47
[ 107.437430] [drm:intel_calculate_wm] FIFO entries required for mode: 41
[ 107.437439] [drm:intel_calculate_wm] FIFO watermark level: 4
[ 107.437449] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) B: 48
[ 107.437459] [drm:i9xx_update_wm] FIFO watermarks - A: 8, B: 46
[ 107.437469] [drm:i9xx_update_wm] Setting FIFO watermarks - A: 8, B:
46, C: 2, SR 1
[ 107.437788] [drm:drm_mode_setcrtc] [CRTC:6]
[ 107.437809] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 107.437822] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (191 0)
[ 107.437836] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 107.437846] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 107.437877] [drm:i9xx_update_primary_plane] Writing base 02000000
000002FC 191 0 8192
[ 107.438660] [drm:intel_crtc_cursor_set_obj] cursor off
[ 107.438706] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) A: 47
[ 107.438718] [drm:intel_calculate_wm] FIFO entries required for mode: 41
[ 107.438727] [drm:intel_calculate_wm] FIFO watermark level: 4
[ 107.438736] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) B: 48
[ 107.438747] [drm:i9xx_update_wm] FIFO watermarks - A: 8, B: 46
[ 107.438757] [drm:i9xx_update_wm] Setting FIFO watermarks - A: 8, B:
46, C: 2, SR 1
[ 107.453368] [drm:add_framebuffer_internal] [FB:24]
[ 107.453419] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) A: 47
[ 107.453429] [drm:intel_calculate_wm] FIFO entries required for mode: 41
[ 107.453438] [drm:intel_calculate_wm] FIFO watermark level: 4
[ 107.453448] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) B: 48
[ 107.453460] [drm:i9xx_update_wm] FIFO watermarks - A: 8, B: 46
[ 107.453469] [drm:i9xx_update_wm] Setting FIFO watermarks - A: 8, B:
46, C: 2, SR 1
[ 107.453790] [drm:drm_mode_setcrtc] [CRTC:6]
[ 107.453814] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 107.453825] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (192 0)
[ 107.453839] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 107.453850] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 107.453882] [drm:i9xx_update_primary_plane] Writing base 02000000
00000300 192 0 8192
[ 107.454667] [drm:intel_crtc_cursor_set_obj] cursor off
[ 107.454713] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) A: 47
[ 107.454724] [drm:intel_calculate_wm] FIFO entries required for mode: 41
[ 107.454732] [drm:intel_calculate_wm] FIFO watermark level: 4
[ 107.454742] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) B: 48
[ 107.454752] [drm:i9xx_update_wm] FIFO watermarks - A: 8, B: 46
[ 107.454764] [drm:i9xx_update_wm] Setting FIFO watermarks - A: 8, B:
46, C: 2, SR 1
[ 107.461486] [drm:add_framebuffer_internal] [FB:25]
[ 107.461555] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) A: 47
[ 107.461566] [drm:intel_calculate_wm] FIFO entries required for mode: 41
[ 107.461574] [drm:intel_calculate_wm] FIFO watermark level: 4
[ 107.461585] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) B: 48
[ 107.461595] [drm:i9xx_update_wm] FIFO watermarks - A: 8, B: 46
[ 107.461605] [drm:i9xx_update_wm] Setting FIFO watermarks - A: 8, B:
46, C: 2, SR 1
[ 107.461912] [drm:drm_mode_setcrtc] [CRTC:6]
[ 107.461933] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 107.461946] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (193 0)
[ 107.461960] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 107.461970] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 107.462002] [drm:i9xx_update_primary_plane] Writing base 02000000
00000304 193 0 8192
[ 107.462787] [drm:intel_crtc_cursor_set_obj] cursor off
[ 107.462832] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) A: 47
[ 107.462844] [drm:intel_calculate_wm] FIFO entries required for mode: 41
[ 107.462853] [drm:intel_calculate_wm] FIFO watermark level: 4
[ 107.462862] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) B: 48
[ 107.462873] [drm:i9xx_update_wm] FIFO watermarks - A: 8, B: 46
[ 107.462884] [drm:i9xx_update_wm] Setting FIFO watermarks - A: 8, B:
46, C: 2, SR 1
[ 107.533308] [drm:add_framebuffer_internal] [FB:26]
[ 107.533354] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) A: 47
[ 107.533366] [drm:intel_calculate_wm] FIFO entries required for mode: 41
[ 107.533374] [drm:intel_calculate_wm] FIFO watermark level: 4
[ 107.533384] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) B: 48
[ 107.533394] [drm:i9xx_update_wm] FIFO watermarks - A: 8, B: 46
[ 107.533404] [drm:i9xx_update_wm] Setting FIFO watermarks - A: 8, B:
46, C: 2, SR 1
[ 108.019049] [drm:drm_mode_setcrtc] [CRTC:6]
[ 108.019092] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 108.019106] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (192 0)
[ 108.019120] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 108.019132] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 108.019163] [drm:i9xx_update_primary_plane] Writing base 02000000
00000300 192 0 8192
[ 108.024007] [drm:drm_mode_setcrtc] [CRTC:6]
[ 108.024450] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 108.024471] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (175 0)
[ 108.024487] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 108.024498] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 108.024530] [drm:i9xx_update_primary_plane] Writing base 02000000
000002BC 175 0 8192
[ 108.029587] [drm:drm_mode_setcrtc] [CRTC:6]
[ 108.029636] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 108.029649] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (162 0)
[ 108.029663] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 108.029675] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 108.029705] [drm:i9xx_update_primary_plane] Writing base 02000000
00000288 162 0 8192
[ 108.045493] [drm:drm_mode_setcrtc] [CRTC:6]
[ 108.045541] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 108.045555] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (138 0)
[ 108.045568] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 108.045579] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 108.045610] [drm:i9xx_update_primary_plane] Writing base 02000000
00000228 138 0 8192
[ 108.053505] [drm:drm_mode_setcrtc] [CRTC:6]
[ 108.053556] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 108.053570] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (131 0)
[ 108.053583] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 108.053595] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 108.053627] [drm:i9xx_update_primary_plane] Writing base 02000000
0000020C 131 0 8192
[ 108.062873] [drm:drm_mode_setcrtc] [CRTC:6]
[ 108.062922] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 108.062936] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (127 0)
[ 108.062949] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 108.062960] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 108.062991] [drm:i9xx_update_primary_plane] Writing base 02000000
000001FC 127 0 8192
[ 108.189447] [drm:drm_mode_setcrtc] [CRTC:6]
[ 108.189498] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 108.189511] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (125 0)
[ 108.189526] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 108.189537] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 108.189566] [drm:i9xx_update_primary_plane] Writing base 02000000
000001F4 125 0 8192
[ 108.197482] [drm:drm_mode_setcrtc] [CRTC:6]
[ 108.197530] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 108.197545] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (119 0)
[ 108.197559] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 108.197570] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 108.197602] [drm:i9xx_update_primary_plane] Writing base 02000000
000001DC 119 0 8192
[ 108.206981] [drm:drm_mode_setcrtc] [CRTC:6]
[ 108.207033] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 108.207047] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (108 0)
[ 108.207061] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 108.207072] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 108.207102] [drm:i9xx_update_primary_plane] Writing base 02000000
000001B0 108 0 8192
[ 108.213437] [drm:drm_mode_setcrtc] [CRTC:6]
[ 108.213486] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 108.213500] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (96 0)
[ 108.213512] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 108.213524] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 108.213553] [drm:i9xx_update_primary_plane] Writing base 02000000
00000180 96 0 8192
[ 108.221482] [drm:drm_mode_setcrtc] [CRTC:6]
[ 108.221533] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 108.221549] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (83 0)
[ 108.221563] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 108.221574] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 108.221605] [drm:i9xx_update_primary_plane] Writing base 02000000
0000014C 83 0 8192
[ 108.229463] [drm:drm_mode_setcrtc] [CRTC:6]
[ 108.229511] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 108.229526] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (70 0)
[ 108.229540] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 108.229551] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 108.229583] [drm:i9xx_update_primary_plane] Writing base 02000000
00000118 70 0 8192
[ 108.237476] [drm:drm_mode_setcrtc] [CRTC:6]
[ 108.237527] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 108.237541] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (57 0)
[ 108.237555] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 108.237566] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 108.237597] [drm:i9xx_update_primary_plane] Writing base 02000000
000000E4 57 0 8192
[ 108.245468] [drm:drm_mode_setcrtc] [CRTC:6]
[ 108.245517] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 108.245531] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (44 0)
[ 108.245546] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 108.245557] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 108.245589] [drm:i9xx_update_primary_plane] Writing base 02000000
000000B0 44 0 8192
[ 108.254049] [drm:drm_mode_setcrtc] [CRTC:6]
[ 108.254098] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 108.254113] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (31 0)
[ 108.254128] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 108.254138] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 108.254170] [drm:i9xx_update_primary_plane] Writing base 02000000
0000007C 31 0 8192
[ 108.261452] [drm:drm_mode_setcrtc] [CRTC:6]
[ 108.261499] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 108.261513] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (18 0)
[ 108.261527] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 108.261537] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 108.261566] [drm:i9xx_update_primary_plane] Writing base 02000000
00000048 18 0 8192
[ 108.269468] [drm:drm_mode_setcrtc] [CRTC:6]
[ 108.269518] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 108.269533] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (7 0)
[ 108.269548] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 108.269558] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 108.269592] [drm:i9xx_update_primary_plane] Writing base 02000000
0000001C 7 0 8192
[ 108.277455] [drm:drm_mode_setcrtc] [CRTC:6]
[ 108.277505] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 108.277518] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (0 0)
[ 108.277532] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 108.277543] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 108.277574] [drm:i9xx_update_primary_plane] Writing base 02000000
00000000 0 0 8192
[ 109.524893] [drm:intel_crtc_cursor_set_obj] cursor off
[ 109.524935] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) A: 47
[ 109.524946] [drm:intel_calculate_wm] FIFO entries required for mode: 41
[ 109.524954] [drm:intel_calculate_wm] FIFO watermark level: 4
[ 109.524964] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) B: 48
[ 109.524974] [drm:i9xx_update_wm] FIFO watermarks - A: 8, B: 46
[ 109.524985] [drm:i9xx_update_wm] Setting FIFO watermarks - A: 8, B:
46, C: 2, SR 1
[ 109.525249] [drm:drm_mode_setcrtc] [CRTC:6]
[ 109.525273] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 109.525284] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (13 0)
[ 109.525298] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 109.525308] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 109.525336] [drm:i9xx_update_primary_plane] Writing base 02000000
00000034 13 0 8192
[ 109.533250] [drm:drm_mode_setcrtc] [CRTC:6]
[ 109.533297] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 109.533310] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (24 0)
[ 109.533325] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 109.533336] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 109.533368] [drm:i9xx_update_primary_plane] Writing base 02000000
00000060 24 0 8192
[ 109.541230] [drm:drm_mode_setcrtc] [CRTC:6]
[ 109.541279] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 109.541292] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (34 0)
[ 109.541307] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 109.541319] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 109.541348] [drm:i9xx_update_primary_plane] Writing base 02000000
00000088 34 0 8192
[ 109.549279] [drm:drm_mode_setcrtc] [CRTC:6]
[ 109.549329] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 109.549343] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (43 0)
[ 109.549359] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 109.549369] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 109.549398] [drm:i9xx_update_primary_plane] Writing base 02000000
000000AC 43 0 8192
[ 109.557006] [drm:add_framebuffer_internal] [FB:27]
[ 109.557053] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) A: 47
[ 109.557064] [drm:intel_calculate_wm] FIFO entries required for mode: 41
[ 109.557073] [drm:intel_calculate_wm] FIFO watermark level: 4
[ 109.557082] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) B: 48
[ 109.557093] [drm:i9xx_update_wm] FIFO watermarks - A: 8, B: 46
[ 109.557103] [drm:i9xx_update_wm] Setting FIFO watermarks - A: 8, B:
46, C: 2, SR 1
[ 109.557413] [drm:drm_mode_setcrtc] [CRTC:6]
[ 109.557436] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 109.557448] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (45 0)
[ 109.557462] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 109.557472] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 109.557500] [drm:i9xx_update_primary_plane] Writing base 02000000
000000B4 45 0 8192
[ 109.558277] [drm:intel_crtc_cursor_set_obj] cursor off
[ 109.558324] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) A: 47
[ 109.558336] [drm:intel_calculate_wm] FIFO entries required for mode: 41
[ 109.558344] [drm:intel_calculate_wm] FIFO watermark level: 4
[ 109.558354] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) B: 48
[ 109.558364] [drm:i9xx_update_wm] FIFO watermarks - A: 8, B: 46
[ 109.558375] [drm:i9xx_update_wm] Setting FIFO watermarks - A: 8, B:
46, C: 2, SR 1
[ 109.565015] [drm:add_framebuffer_internal] [FB:28]
[ 109.565061] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) A: 47
[ 109.565072] [drm:intel_calculate_wm] FIFO entries required for mode: 41
[ 109.565080] [drm:intel_calculate_wm] FIFO watermark level: 4
[ 109.565090] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) B: 48
[ 109.565100] [drm:i9xx_update_wm] FIFO watermarks - A: 8, B: 46
[ 109.565110] [drm:i9xx_update_wm] Setting FIFO watermarks - A: 8, B:
46, C: 2, SR 1
[ 109.565421] [drm:drm_mode_setcrtc] [CRTC:6]
[ 109.565444] [drm:drm_mode_setcrtc] [CONNECTOR:11:LVDS-1]
[ 109.565455] [drm:intel_crtc_set_config] [CRTC:6] [FB:17]
#connectors=1 (x y) (46 0)
[ 109.565469] [drm:intel_set_config_compute_mode_changes] computed
changes for [CRTC:6], mode_changed=0, fb_changed=1
[ 109.565479] [drm:intel_modeset_stage_output_state]
[CONNECTOR:11:LVDS-1] to [CRTC:6]
[ 109.565505] [drm:i9xx_update_primary_plane] Writing base 02000000
000000B8 46 0 8192
[ 109.566298] [drm:intel_crtc_cursor_set_obj] cursor off
[ 109.566344] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) A: 47
[ 109.566355] [drm:intel_calculate_wm] FIFO entries required for mode: 41
[ 109.566363] [drm:intel_calculate_wm] FIFO watermark level: 4
[ 109.566373] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) B: 48
[ 109.566383] [drm:i9xx_update_wm] FIFO watermarks - A: 8, B: 46
[ 109.566394] [drm:i9xx_update_wm] Setting FIFO watermarks - A: 8, B:
46, C: 2, SR 1
[ 109.644956] [drm:add_framebuffer_internal] [FB:29]
[ 109.645001] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) A: 47
[ 109.645013] [drm:intel_calculate_wm] FIFO entries required for mode: 41
[ 109.645022] [drm:intel_calculate_wm] FIFO watermark level: 4
[ 109.645031] [drm:i830_get_fifo_size] FIFO size - (0x00017e5f) B: 48
[ 109.645041] [drm:i9xx_update_wm] FIFO watermarks - A: 8, B: 46
[ 109.645051] [drm:i9xx_update_wm] Setting FIFO watermarks - A: 8, B:
46, C: 2, SR 1
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