On Thu, Jun 12, 2014 at 08:35:48AM -0700, Jesse Barnes wrote: > From: Kristen Carlson Accardi <kristen@xxxxxxxxxxxxxxx> > > This matches the runtime suspend paths and allows the system to enter > the lowest power mode at freeze time. > > v2: move disable_pc8 call to thaw_early (Imre) > move enable_pc8 to freeze_late (Imre/Jesse) > v3: drop spurious hunk from _freeze now that we have freeze_late (Jesse) > v4: move back to suspend_late (Imre was right) > > Reviewed-by: Imre Deak <imre.deak@xxxxxxxxx> > Signed-off-by: Kristen Carlson Accardi <kristen@xxxxxxxxxxxxxxx> > Signed-off-by: Jesse Barnes <jbarnes@xxxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_drv.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c > index e54dc6c..4823435 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -610,6 +610,9 @@ static int i915_drm_thaw_early(struct drm_device *dev) > { > struct drm_i915_private *dev_priv = dev->dev_private; > > + if (IS_HASWELL(dev) || IS_BROADWELL(dev)) > + hsw_disable_pc8(dev_priv); Not terribly happy really about this one here, since it leaks platform logic into the generic codepaths. Sooner or later we'll add the same for byt/chv and then it'll slowly diverge ... Queued for now (since runtime pm is suffering from too much platform specifics a bit in general), but grumpily. -Daniel > + > intel_uncore_early_sanitize(dev); > intel_uncore_sanitize(dev); > intel_power_domains_init_hw(dev_priv); > @@ -893,6 +896,7 @@ static int i915_pm_suspend_late(struct device *dev) > { > struct pci_dev *pdev = to_pci_dev(dev); > struct drm_device *drm_dev = pci_get_drvdata(pdev); > + struct drm_i915_private *dev_priv = drm_dev->dev_private; > > /* > * We have a suspedn ordering issue with the snd-hda driver also > @@ -906,6 +910,9 @@ static int i915_pm_suspend_late(struct device *dev) > if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF) > return 0; > > + if (IS_HASWELL(drm_dev) || IS_BROADWELL(drm_dev)) > + hsw_enable_pc8(dev_priv); > + > pci_disable_device(pdev); > pci_set_power_state(pdev, PCI_D3hot); > > -- > 1.9.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx