On Tue, 10 Jun 2014, Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> wrote: > On Tue, Jun 10, 2014 at 06:34:18PM +0300, Jani Nikula wrote: >> On Tue, 10 Jun 2014, Jani Nikula <jani.nikula@xxxxxxxxxxxxxxx> wrote: >> > On Mon, 09 Jun 2014, Damien Lespiau <damien.lespiau@xxxxxxxxx> wrote: >> >> On Mon, Jun 09, 2014 at 10:06:49AM -0700, Tom.O'Rourke@xxxxxxxxx wrote: >> >>> From: Tom O'Rourke <Tom.O'Rourke@xxxxxxxxx> >> >>> >> >>> In gen8_enable_rps, don't write CHV registers unless IS_CHERRYVIEW. >> >>> >> >>> Signed-off-by: Tom O'Rourke <Tom.O'Rourke@xxxxxxxxx> >> >> >> >> A lovely catch. >> > >> > Sadly gen8_enable_rps does not get called on chv, so the fix is wrong. >> >> To elaborate, I think we need a patch dropping the wa altogether (which >> we can queue for 3.15 through stable because the change affects >> broadwell) and another patch, if needed, adding the wa in the chv >> specific function. > > This is just a merge mishap in one the chv patches. Someone just > needs to send a patch that moves the misapplied stuff to the > appropriate chv function. Right. So my first comment was correct, and my elaboration total bullcrap. This is not present in 3.15, but we've queued the screwup for 3.16. Thanks for the correction Ville. BR, Jani. > > -- > Ville Syrjälä > Intel OTC -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
