On Fri, May 30, 2014 at 05:16:36PM +0100, Chris Wilson wrote: > If we hit a vblank and see that have a pageflip queue but not yet > processed, ensure that the GPU is running at maximum in order to clear > the backlog. Pageflips are only queued for the following vblank, if we > miss it, there will be a visible stutter. Boosting the GPU frequency > doesn't prevent us from missing the target vblank, but it should help > the subsequent frames hitting theirs. > > v2: Reorder vblank vs flip-complete so that we only check for a missed > flip after processing the completion events, and avoid spurious boosts. > > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_drv.h | 1 + > drivers/gpu/drm/i915/intel_display.c | 6 ++++++ > drivers/gpu/drm/i915/intel_drv.h | 1 + > drivers/gpu/drm/i915/intel_pm.c | 15 +++++++++++++++ > 4 files changed, 23 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index f9450045a532..af050e439168 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -910,6 +910,7 @@ struct intel_gen6_power_mgmt { > > bool enabled; > struct delayed_work delayed_resume_work; > + struct work_struct boost_work; > > /* > * Protects RPS/RC6 register access and PCU communication. > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 54b69838e2de..3ad1529e74df 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -9258,6 +9258,7 @@ void intel_check_page_flip(struct drm_device *dev, int pipe) > struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe]; > struct intel_crtc *intel_crtc = to_intel_crtc(crtc); > unsigned long flags; > + bool outstanding; > > if (crtc == NULL) > return; > @@ -9270,7 +9271,12 @@ void intel_check_page_flip(struct drm_device *dev, int pipe) > page_flip_completed(dev_priv, intel_crtc, intel_crtc->unpin_work); > intel_crtc->unpin_work = NULL; > } > + outstanding = (intel_crtc->unpin_work != NULL && > + crtc_sbc(intel_crtc) - intel_crtc->unpin_work->sbc > 1); s/outstanding/still_pending/? Since the situation is very much not oustanding at all ... -Daniel > spin_unlock_irqrestore(&dev->event_lock, flags); > + > + if (outstanding) > + intel_queue_rps_boost(dev); > } > > static int intel_crtc_page_flip(struct drm_crtc *crtc, > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h > index b17c295fe967..a77f104db366 100644 > --- a/drivers/gpu/drm/i915/intel_drv.h > +++ b/drivers/gpu/drm/i915/intel_drv.h > @@ -964,6 +964,7 @@ void ironlake_teardown_rc6(struct drm_device *dev); > void gen6_update_ring_freq(struct drm_device *dev); > void gen6_rps_idle(struct drm_i915_private *dev_priv); > void gen6_rps_boost(struct drm_i915_private *dev_priv); > +void intel_queue_rps_boost(struct drm_device *dev); > void intel_aux_display_runtime_get(struct drm_i915_private *dev_priv); > void intel_aux_display_runtime_put(struct drm_i915_private *dev_priv); > void intel_runtime_pm_get(struct drm_i915_private *dev_priv); > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 00ab3c7a282d..dce2c268851f 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -6707,6 +6707,19 @@ int vlv_freq_opcode(struct drm_i915_private *dev_priv, int val) > return DIV_ROUND_CLOSEST(4 * mul * val, dev_priv->mem_freq) + 0xbd - 6; > } > > +static void __intel_rps_boost_work(struct work_struct *work) > +{ > + gen6_rps_boost(container_of(work, struct drm_i915_private, rps.boost_work)); > +} > + > +void intel_queue_rps_boost(struct drm_device *dev) > +{ > + struct drm_i915_private *dev_priv = to_i915(dev); > + > + if (INTEL_INFO(dev)->gen >= 6) > + queue_work(dev_priv->wq, &dev_priv->rps.boost_work); > +} > + > void intel_pm_setup(struct drm_device *dev) > { > struct drm_i915_private *dev_priv = dev->dev_private; > @@ -6715,6 +6728,8 @@ void intel_pm_setup(struct drm_device *dev) > > INIT_DELAYED_WORK(&dev_priv->rps.delayed_resume_work, > intel_gen6_powersave_work); > + INIT_WORK(&dev_priv->rps.boost_work, > + __intel_rps_boost_work); > > dev_priv->pm.suspended = false; > dev_priv->pm.irqs_disabled = false; > -- > 2.0.0.rc4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx