On Wed, May 28, 2014 at 12:42:01PM +0530, sourab.gupta@xxxxxxxxx wrote: > +static int intel_postpone_flip(struct drm_i915_gem_object *obj) > +{ > + int ret; > + > + if (!obj->ring) > + return 0; > + > + if (i915_seqno_passed(obj->ring->get_seqno(obj->ring, true), > + obj->last_write_seqno)) > + return 0; obj->last_write_seqno could be 0 here. To be correct, test against obj->last_write_seqno == 0 instead of obj->ring == NULL first. > + ret = i915_gem_check_olr(obj->ring, obj->last_write_seqno); > + if (ret) > + return ret; > + > + if (WARN_ON(!obj->ring->irq_get(obj->ring))) > + return 0; > + > + return 1; > +} > + > static int intel_default_queue_flip(struct drm_device *dev, > struct drm_crtc *crtc, > struct drm_framebuffer *fb, > @@ -11515,6 +11652,9 @@ static void intel_init_display(struct drm_device *dev) > break; > } > > + if (intel_use_mmio_flip(dev)) > + dev_priv->display.queue_flip = intel_queue_mmio_flip; I'd still like to see this as a tristate, i.e. use_mmio_flip(dev) > 1 here. E.g. we will want to use mmio flips for !BCS, but GPU flips when BCS is active. -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx