On Mon, 19 May 2014 19:23:26 +0300 ville.syrjala@xxxxxxxxxxxxxxx wrote: > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > Clear the reset domain after a succesful GPU reset on ilk. We already > do that on gen4, so let's try to be a bit more consistent. And if > ether render or media reset fails, we might use the leftover value > in the register to pinpoint the culprit. > > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_uncore.c | 10 ++++++++-- > 1 file changed, 8 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c > index 5c29cfe..cd0d6e2 100644 > --- a/drivers/gpu/drm/i915/intel_uncore.c > +++ b/drivers/gpu/drm/i915/intel_uncore.c > @@ -1004,8 +1004,14 @@ static int ironlake_do_reset(struct drm_device *dev) > > I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR, > ILK_GRDOM_MEDIA | ILK_GRDOM_RESET_ENABLE); > - return wait_for((I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) & > - ILK_GRDOM_RESET_ENABLE) == 0, 500); > + ret = wait_for((I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) & > + ILK_GRDOM_RESET_ENABLE) == 0, 500); > + if (ret) > + return ret; > + > + I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR, 0); > + > + return 0; > } > > static int gen6_do_reset(struct drm_device *dev) Reviewed-by: Jesse Barnes <jbarnes@xxxxxxxxxxxxxxxx> -- Jesse Barnes, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
