On Mon, May 19, 2014 at 10:25:19PM +0300, ville.syrjala@xxxxxxxxxxxxxxx wrote: > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > On pre-ctg GPU reset also resets the display hardware. Force a mode > restore after the GPU reset, and also re-init clock gating. > > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_drv.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c > index b948c71..2ec3796 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -794,6 +794,14 @@ int i915_reset(struct drm_device *dev) > if (INTEL_INFO(dev)->gen > 5) > intel_reset_gt_powersave(dev); > > + if (IS_GEN4(dev) && !IS_G4X(dev)) { > + intel_init_clock_gating(dev); > + > + drm_modeset_lock_all(dev); > + intel_modeset_setup_hw_state(dev, true); > + drm_modeset_unlock_all(dev); Locking inversion here. I think we need to push this down to the very end. Also this leaves the interesting question of what happens with vblank waits and friends ... -Daniel > + } > + > intel_hpd_init(dev); > } else { > mutex_unlock(&dev->struct_mutex); > -- > 1.8.5.5 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx