Re: [PATCH 3/5] drm/i915: Convert uncleared FIFO underrun message to errors

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On Fri, May 16, 2014 at 07:40:23PM +0300, ville.syrjala@xxxxxxxxxxxxxxx wrote:
> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> 
> Some platforms have a shared error interrupt, so if FIFO underrun
> reporting gets disabled for one pipe/transcoder it gets disabled
> for all pipes/transcoders.
> 
> When we disable FIFO underrun reporting we check whether the
> interrupt was enabled or not. If it wasn't we might have missed
> an underrun and we perform one last check right there. Currently
> we print a debug message when an underrun is detect using this
> mechanism. Promote the message to DRM_ERROR() to match the other
> underrun error messages.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>

Queued for -next, thanks for the patch.
-Daniel

> ---
>  drivers/gpu/drm/i915/i915_irq.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index fdce260..862964f 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -344,8 +344,8 @@ static void ivybridge_set_fifo_underrun_reporting(struct drm_device *dev,
>  
>  		if (!was_enabled &&
>  		    (I915_READ(GEN7_ERR_INT) & ERR_INT_FIFO_UNDERRUN(pipe))) {
> -			DRM_DEBUG_KMS("uncleared fifo underrun on pipe %c\n",
> -				      pipe_name(pipe));
> +			DRM_ERROR("uncleared fifo underrun on pipe %c\n",
> +				  pipe_name(pipe));
>  		}
>  	}
>  }
> @@ -429,8 +429,8 @@ static void cpt_set_fifo_underrun_reporting(struct drm_device *dev,
>  
>  		if (!was_enabled &&
>  		    (tmp & SERR_INT_TRANS_FIFO_UNDERRUN(pch_transcoder))) {
> -			DRM_DEBUG_KMS("uncleared pch fifo underrun on pch transcoder %c\n",
> -				      transcoder_name(pch_transcoder));
> +			DRM_ERROR("uncleared pch fifo underrun on pch transcoder %c\n",
> +				  transcoder_name(pch_transcoder));
>  		}
>  	}
>  }
> -- 
> 1.8.5.5
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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