On Tue, May 13, 2014 at 03:30:27PM +0100, Damien Lespiau wrote: > Signed-off-by: Damien Lespiau <damien.lespiau@xxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_debugfs.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c > index 18b3565..6801987 100644 > --- a/drivers/gpu/drm/i915/i915_debugfs.c > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > @@ -3084,7 +3084,7 @@ static const struct file_operations i915_display_crc_ctl_fops = { > static void wm_latency_show(struct seq_file *m, const uint16_t wm[5]) > { > struct drm_device *dev = m->private; > - int num_levels = IS_HASWELL(dev) || IS_BROADWELL(dev) ? 5 : 4; > + int num_levels = ilk_wm_max_level(dev) + 1; > int level; > > drm_modeset_lock_all(dev); > @@ -3167,7 +3167,7 @@ static ssize_t wm_latency_write(struct file *file, const char __user *ubuf, > struct seq_file *m = file->private_data; > struct drm_device *dev = m->private; > uint16_t new[5] = { 0 }; > - int num_levels = IS_HASWELL(dev) || IS_BROADWELL(dev) ? 5 : 4; > + int num_levels = ilk_wm_max_level(dev) + 1; One idea that has been rattling in my head would be to introduce dev_priv->wm.max_level or some such thing that would be computed dynamically like so: dev_priv->wm.max_level = min(hw_max, last_level_with_valid_latency_value); This way we could actually disable some of the deeper levels without worrying that the watermark code will encounter a zero latency value somewhere. We could even do other crazy things like trying out LP3 on ILK ;) But that's a bit orthogonal, and even then this patch does make sense. For patches 3-5: Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> I'll let someone else bikeshed the for_each_crtc macros. > int level; > int ret; > char tmp[32]; > -- > 1.8.3.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx