On Tue, May 13, 2014 at 12:37 AM, Jesse Barnes <jbarnes@xxxxxxxxxxxxxxxx> wrote: > Like on ILK, the pipe won't be running until later on. Like on ilk?! Since when is vlv display derived from that? "[PATCH 3/4] drm/i915: Kill vblank waits after pipe enable on gmch platforms" from Ville makes a more consistent impression to me. Also, and Bugzilla: tags for this one? -Daniel > Signed-off-by: Jesse Barnes <jbarnes@xxxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_display.c | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index c65e7f7..c66d2ea 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -4344,7 +4344,6 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc) > > intel_update_watermarks(crtc); > intel_enable_pipe(intel_crtc); > - intel_wait_for_vblank(dev_priv->dev, pipe); > intel_set_cpu_fifo_underrun_reporting(dev, pipe, true); > > intel_enable_primary_hw_plane(dev_priv, plane, pipe); > -- > 1.7.9.5 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
