On Fri, May 09, 2014 at 01:08:54PM +0100, oscar.mateo@xxxxxxxxx wrote: > + if (ring->id == RCS) { > + reg_state[CTX_LRI_HEADER_2] = MI_LOAD_REGISTER_IMM(1); > + reg_state[CTX_LRI_HEADER_2] |= MI_LRI_FORCE_POSTED; This header doesn't have bit 12 set in BSpec. > + reg_state[CTX_R_PWR_CLK_STATE] = 0x20c8; > + reg_state[CTX_R_PWR_CLK_STATE+1] = 0; > +#if 0 > + /* Offsets not yet defined for these */ > + reg_state[CTX_GPGPU_CSR_BASE_ADDRESS] = 0; > + reg_state[CTX_GPGPU_CSR_BASE_ADDRESS+1] = 0; > +#endif Remove dead code? -- Damien _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx