From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> We always enable vblank interrupts after the planes so move the call into intel_crtc_enable_planes(). Later we will reorder the plane vs. vblank enable/disable to allow vblank interrupts while the planes are getting configured. Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> --- drivers/gpu/drm/i915/intel_display.c | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 820c3a9..aa40c813 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3697,6 +3697,8 @@ static void intel_crtc_enable_planes(struct drm_crtc *crtc) mutex_lock(&dev->struct_mutex); intel_update_fbc(dev); mutex_unlock(&dev->struct_mutex); + + drm_vblank_on(dev, pipe); } static void intel_crtc_disable_planes(struct drm_crtc *crtc) @@ -3784,8 +3786,6 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc) * happening. */ intel_wait_for_vblank(dev, intel_crtc->pipe); - - drm_vblank_on(dev, pipe); } /* IPS only exists on ULT machines and is tied to pipe A. */ @@ -3877,8 +3877,6 @@ static void haswell_crtc_enable(struct drm_crtc *crtc) * to change the workaround. */ haswell_mode_set_planes_workaround(intel_crtc); intel_crtc_enable_planes(crtc); - - drm_vblank_on(dev, pipe); } static void ironlake_pfit_disable(struct intel_crtc *crtc) @@ -4353,8 +4351,6 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc) encoder->enable(encoder); intel_crtc_enable_planes(crtc); - - drm_vblank_on(dev, pipe); } static void i9xx_crtc_enable(struct drm_crtc *crtc) @@ -4389,8 +4385,6 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc) encoder->enable(encoder); intel_crtc_enable_planes(crtc); - - drm_vblank_on(dev, pipe); } static void i9xx_pfit_disable(struct intel_crtc *crtc) -- 1.8.3.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
