On Wed, 09 Apr 2014, ville.syrjala@xxxxxxxxxxxxxxx wrote:
> From: Daniel Vetter <daniel.vetter@xxxxxxxx>
>
> v2: Update to also fill in the new num_pipes field.
>
> v3: Rebase on top of the pciid extraction.
>
> v4: Switch from info->has*ring to info->ring mask. Also add VEBOX support whiel
> at it.
>
> v5: s/CHV_PCI_IDS/CHV_IDS/, and drop the trailing '\'
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> Signed-off-by: Daniel Vetter <daniel.vetter@xxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_drv.c | 12 +++++++++++-
> include/drm/i915_pciids.h | 6 ++++++
> 2 files changed, 17 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index fa5d0ed..5a55131 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -279,6 +279,15 @@ static const struct intel_device_info intel_broadwell_m_info = {
> GEN_DEFAULT_PIPEOFFSETS,
> };
>
> +static const struct intel_device_info intel_cherryview_info = {
> + .is_preliminary = 1,
> + .gen = 8, .num_pipes = 2,
> + .need_gfx_hws = 1, .has_hotplug = 1,
> + .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
> + .is_valleyview = 1,
I hope we're not going to regret this... gotta be careful at each
IS_VALLEYVIEW()!
Reviewed-by: Jani Nikula <jani.nikula@xxxxxxxxx>
> + .display_mmio_offset = VLV_DISPLAY_BASE,
> +};
> +
> /*
> * Make sure any device matches here are from most specific to most
> * general. For example, since the Quanta match is based on the subsystem
> @@ -312,7 +321,8 @@ static const struct intel_device_info intel_broadwell_m_info = {
> INTEL_VLV_M_IDS(&intel_valleyview_m_info), \
> INTEL_VLV_D_IDS(&intel_valleyview_d_info), \
> INTEL_BDW_M_IDS(&intel_broadwell_m_info), \
> - INTEL_BDW_D_IDS(&intel_broadwell_d_info)
> + INTEL_BDW_D_IDS(&intel_broadwell_d_info), \
> + INTEL_CHV_IDS(&intel_cherryview_info)
>
> static const struct pci_device_id pciidlist[] = { /* aka */
> INTEL_PCI_IDS,
> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
> index 940ece4..73274f9 100644
> --- a/include/drm/i915_pciids.h
> +++ b/include/drm/i915_pciids.h
> @@ -233,4 +233,10 @@
> _INTEL_BDW_D_IDS(2, info), \
> _INTEL_BDW_D_IDS(3, info)
>
> +#define INTEL_CHV_IDS(info) \
> + INTEL_VGA_DEVICE(0x22b0, info), \
> + INTEL_VGA_DEVICE(0x22b1, info), \
> + INTEL_VGA_DEVICE(0x22b2, info), \
> + INTEL_VGA_DEVICE(0x22b3, info)
> +
> #endif /* _I915_PCIIDS_H */
> --
> 1.8.3.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
